xref: /netbsd-src/sys/arch/arm/sunxi/sunxi_ccu_div.c (revision bdc22b2e01993381dcefeff2bc9b56ca75a4235c)
1 /* $NetBSD: sunxi_ccu_div.c,v 1.5 2018/03/19 16:19:17 bouyer Exp $ */
2 
3 /*-
4  * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: sunxi_ccu_div.c,v 1.5 2018/03/19 16:19:17 bouyer Exp $");
31 
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 
35 #include <dev/clk/clk_backend.h>
36 
37 #include <arm/sunxi/sunxi_ccu.h>
38 
39 int
40 sunxi_ccu_div_enable(struct sunxi_ccu_softc *sc, struct sunxi_ccu_clk *clk,
41     int enable)
42 {
43 	struct sunxi_ccu_div *div = &clk->u.div;
44 	uint32_t val;
45 
46 	KASSERT(clk->type == SUNXI_CCU_DIV);
47 
48 	if (!div->enable)
49 		return enable ? 0 : EINVAL;
50 
51 	val = CCU_READ(sc, div->reg);
52 	if (enable)
53 		val |= div->enable;
54 	else
55 		val &= ~div->enable;
56 	CCU_WRITE(sc, div->reg, val);
57 
58 	return 0;
59 }
60 
61 u_int
62 sunxi_ccu_div_get_rate(struct sunxi_ccu_softc *sc,
63     struct sunxi_ccu_clk *clk)
64 {
65 	struct sunxi_ccu_div *div = &clk->u.div;
66 	struct clk *clkp, *clkp_parent;
67 	u_int rate, ratio;
68 	uint32_t val;
69 
70 	KASSERT(clk->type == SUNXI_CCU_DIV);
71 
72 	clkp = &clk->base;
73 	clkp_parent = clk_get_parent(clkp);
74 	if (clkp_parent == NULL)
75 		return 0;
76 
77 	rate = clk_get_rate(clkp_parent);
78 	if (rate == 0)
79 		return 0;
80 
81 	val = CCU_READ(sc, div->reg);
82 	if (div->div)
83 		ratio = __SHIFTOUT(val, div->div);
84 	else
85 		ratio = 0;
86 
87 	if ((div->flags & SUNXI_CCU_DIV_ZERO_IS_ONE) != 0 && ratio == 0)
88 		ratio = 1;
89 	if (div->flags & SUNXI_CCU_DIV_POWER_OF_TWO)
90 		ratio = 1 << ratio;
91 	else if (div->flags & SUNXI_CCU_DIV_TIMES_TWO) {
92 		ratio = ratio << 1;
93 		if (ratio == 0)
94 			ratio = 1;
95 	} else
96 		ratio++;
97 
98 	return rate / ratio;
99 }
100 
101 int
102 sunxi_ccu_div_set_rate(struct sunxi_ccu_softc *sc,
103     struct sunxi_ccu_clk *clk, u_int new_rate)
104 {
105 	struct sunxi_ccu_div *div = &clk->u.div;
106 	struct clk *clkp, *clkp_parent;
107 	int parent_rate;
108 	uint32_t val, raw_div;
109 	int ratio;
110 
111 	KASSERT(clk->type == SUNXI_CCU_DIV);
112 
113 	clkp = &clk->base;
114 	clkp_parent = clk_get_parent(clkp);
115 	if (clkp_parent == NULL)
116 		return ENXIO;
117 
118 	if (div->div == 0) {
119 		if ((div->flags & SUNXI_CCU_DIV_SET_RATE_PARENT) != 0)
120 			return clk_set_rate(clkp_parent, new_rate);
121 		else
122 			return ENXIO;
123 	}
124 
125 	val = CCU_READ(sc, div->reg);
126 
127 	parent_rate = clk_get_rate(clkp_parent);
128 	if (parent_rate == 0)
129 		return (new_rate == 0) ? 0 : ERANGE;
130 
131 	ratio = howmany(parent_rate, new_rate);
132 	if ((div->flags & SUNXI_CCU_DIV_TIMES_TWO) != 0) {
133 		if (ratio > 1 && (ratio & 1) != 0)
134 			ratio++;
135 		raw_div = ratio >> 1;
136 	} else if ((div->flags & SUNXI_CCU_DIV_POWER_OF_TWO) != 0) {
137 		return EINVAL;
138 	} else {
139 		raw_div = (ratio > 0 ) ? ratio - 1 : 0;
140 	}
141 	if (raw_div > __SHIFTOUT_MASK(div->div))
142 		return ERANGE;
143 
144 	val &= ~div->div;
145 	val |= __SHIFTIN(raw_div, div->div);
146 	CCU_WRITE(sc, div->reg, val);
147 
148 	return 0;
149 }
150 
151 int
152 sunxi_ccu_div_set_parent(struct sunxi_ccu_softc *sc,
153     struct sunxi_ccu_clk *clk, const char *name)
154 {
155 	struct sunxi_ccu_div *div = &clk->u.div;
156 	uint32_t val;
157 	u_int index;
158 
159 	KASSERT(clk->type == SUNXI_CCU_DIV);
160 
161 	if (div->sel == 0)
162 		return ENODEV;
163 
164 	for (index = 0; index < div->nparents; index++) {
165 		if (div->parents[index] != NULL &&
166 		    strcmp(div->parents[index], name) == 0)
167 			break;
168 	}
169 	if (index == div->nparents)
170 		return EINVAL;
171 
172 	val = CCU_READ(sc, div->reg);
173 	val &= ~div->sel;
174 	val |= __SHIFTIN(index, div->sel);
175 	CCU_WRITE(sc, div->reg, val);
176 
177 	return 0;
178 }
179 
180 const char *
181 sunxi_ccu_div_get_parent(struct sunxi_ccu_softc *sc,
182     struct sunxi_ccu_clk *clk)
183 {
184 	struct sunxi_ccu_div *div = &clk->u.div;
185 	u_int index;
186 	uint32_t val;
187 
188 	KASSERT(clk->type == SUNXI_CCU_DIV);
189 
190 	if (div->sel == 0)
191 		return div->parents[0];
192 
193 	val = CCU_READ(sc, div->reg);
194 	index = __SHIFTOUT(val, div->sel);
195 
196 	return div->parents[index];
197 }
198