xref: /netbsd-src/sys/arch/arm/samsung/exynos_pinctrl.c (revision 87d689fb734c654d2486f87f7be32f1b53ecdbec)
1 /*	$NetBSD: exynos_pinctrl.c,v 1.12 2017/07/02 18:21:52 jmcneill Exp $ */
2 
3 /*-
4 * Copyright (c) 2015 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Marty Fouts
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31 
32 #include "opt_exynos.h"
33 #include "opt_arm_debug.h"
34 #include "gpio.h"
35 
36 #include <sys/cdefs.h>
37 __KERNEL_RCSID(1, "$NetBSD: exynos_pinctrl.c,v 1.12 2017/07/02 18:21:52 jmcneill Exp $");
38 
39 #include <sys/param.h>
40 #include <sys/bus.h>
41 #include <sys/device.h>
42 #include <sys/intr.h>
43 #include <sys/systm.h>
44 #include <sys/kmem.h>
45 #include <sys/gpio.h>
46 
47 #include <dev/gpio/gpiovar.h>
48 
49 #include <arm/samsung/exynos_reg.h>
50 #include <arm/samsung/exynos_var.h>
51 #include <arm/samsung/exynos_intr.h>
52 #include <arm/samsung/exynos_pinctrl.h>
53 
54 #include <dev/fdt/fdtvar.h>
55 
56 struct exynos_pinctrl_config {
57 	int pc_phandle;
58 	struct exynos_gpio_pin_cfg pc_pincfg;
59 	struct exynos_pinctrl_softc *pc_sc;
60 };
61 
62 static int exynos_pinctrl_match(device_t, cfdata_t, void *);
63 static void exynos_pinctrl_attach(device_t, device_t, void *);
64 
65 static int  exynos_pinctrl_set_cfg(device_t, const void *, size_t);
66 static void exynos_parse_config(int, struct exynos_gpio_pin_cfg *);
67 
68 static struct fdtbus_pinctrl_controller_func exynos_pinctrl_controller_func = {
69 	.set_config = exynos_pinctrl_set_cfg
70 };
71 
72 CFATTACH_DECL_NEW(exynos_pinctrl, sizeof(struct exynos_pinctrl_softc),
73 	exynos_pinctrl_match, exynos_pinctrl_attach, NULL, NULL);
74 
75 static int
76 exynos_pinctrl_match(device_t parent, cfdata_t cf, void *aux)
77 {
78 	const char * const compatible[] = {
79 	    "samsung,exynos5410-pinctrl",
80 	    "samsung,exynos5420-pinctrl",
81 	    NULL };
82 	struct fdt_attach_args * const faa = aux;
83 	return of_match_compatible(faa->faa_phandle, compatible);
84 }
85 
86 static bool
87 is_pinctrl(int phandle)
88 {
89 	int len = OF_getproplen(phandle, "samsung,pins");
90 	return len > 0;
91 }
92 
93 static void
94 exynos_pinctrl_attach(device_t parent, device_t self, void *aux)
95 {
96 	struct exynos_pinctrl_softc * const sc
97 		= kmem_zalloc(sizeof(*sc), KM_SLEEP);
98 	struct fdt_attach_args * const faa = aux;
99 	bus_addr_t addr;
100 	bus_size_t size;
101 	int error;
102 	int child;
103 
104 	if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) {
105 		aprint_error(": couldn't get registers\n");
106 		return;
107 	}
108 
109 	aprint_normal(" pinctl @ 0x%08x ", (uint)addr);
110 	sc->sc_dev = self;
111 	sc->sc_bst = faa->faa_bst;
112 	error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh);
113 	if (error) {
114 		aprint_error(": couldn't map %#llx: %d",
115 			     (uint64_t)addr, error);
116 		return;
117 	}
118 
119 	aprint_naive("\n");
120 	aprint_normal("\n");
121 
122 	for (child = OF_child(faa->faa_phandle); child;
123 	     child = OF_peer(child)) {
124 
125 		if (of_getprop_bool(child, "gpio-controller")) {
126 			exynos_gpio_bank_config(sc, faa, child);
127 		}
128 
129 		if (is_pinctrl(child)) {
130 			fdtbus_register_pinctrl_config(self, child,
131 						       &exynos_pinctrl_controller_func);
132 		}
133 	}
134 
135 	fdtbus_pinctrl_configure();
136 }
137 
138 static void
139 exynos_parse_config(int phandle, struct exynos_gpio_pin_cfg *gc)
140 {
141 	of_getprop_uint32(phandle, "samsung,pin-function", &gc->cfg);
142 	of_getprop_uint32(phandle, "samsung,pin-pud", &gc->pud);
143 	of_getprop_uint32(phandle, "samsung,pin-drv", &gc->drv);
144 	of_getprop_uint32(phandle, "samsung,pin-conpwd", &gc->conpwd);
145 	of_getprop_uint32(phandle, "samsung,pin-pudpwd", &gc->pudpwd);
146 }
147 
148 static int
149 exynos_do_config(struct exynos_pinctrl_config *pc)
150 {
151 	struct exynos_gpio_pin_cfg *gc = &pc->pc_pincfg;
152 	struct exynos_gpio_bank *bank;
153 	const char *pins;
154 
155 	int pins_len = OF_getproplen(pc->pc_phandle, "samsung,pins");
156 	if (pins_len <= 0)
157 		return -1;
158 
159 	for (pins = fdtbus_get_string(pc->pc_phandle, "samsung,pins");
160 	     pins_len > 0;
161 	     pins_len -= strlen(pins) + 1, pins += strlen(pins) + 1) {
162 		bank = exynos_gpio_bank_lookup(pins);
163 		if (bank == NULL) {
164 			aprint_error_dev(pc->pc_sc->sc_dev,
165 			    "unknown pin name '%s'\n", pins);
166 			continue;
167 		}
168 		exynos_gpio_pin_ctl_write(bank, gc);
169 	}
170 
171 	return 0;
172 }
173 
174 static int
175 exynos_pinctrl_set_cfg(device_t dev, const void *data, size_t len)
176 {
177 	struct exynos_pinctrl_config pc;
178 
179 	if (len != 4)
180 		return -1;
181 
182 	pc.pc_phandle = fdtbus_get_phandle_from_native(be32dec(data));
183 	pc.pc_sc = device_private(dev);
184 	exynos_parse_config(pc.pc_phandle, &pc.pc_pincfg);
185 
186 	return exynos_do_config(&pc);
187 }
188