xref: /netbsd-src/sys/arch/arm/samsung/exynos_ehci.c (revision bdc22b2e01993381dcefeff2bc9b56ca75a4235c)
1 /* $NetBSD: exynos_ehci.c,v 1.4 2018/07/03 16:09:04 jmcneill Exp $ */
2 
3 /*-
4  * Copyright (c) 2015-2018 Jared McNeill <jmcneill@invisible.ca>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: exynos_ehci.c,v 1.4 2018/07/03 16:09:04 jmcneill Exp $");
31 
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/device.h>
35 #include <sys/intr.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 
39 #include <dev/usb/usb.h>
40 #include <dev/usb/usbdi.h>
41 #include <dev/usb/usbdivar.h>
42 #include <dev/usb/usb_mem.h>
43 #include <dev/usb/ehcireg.h>
44 #include <dev/usb/ehcivar.h>
45 
46 #include <dev/fdt/fdtvar.h>
47 
48 static int	exynos_ehci_match(device_t, cfdata_t, void *);
49 static void	exynos_ehci_attach(device_t, device_t, void *);
50 
51 CFATTACH_DECL2_NEW(exynos_ehci, sizeof(struct ehci_softc),
52 	exynos_ehci_match, exynos_ehci_attach, NULL,
53 	ehci_activate, NULL, ehci_childdet);
54 
55 static int
56 exynos_ehci_match(device_t parent, cfdata_t cf, void *aux)
57 {
58 	const char * const compatible[] = {
59 		"samsung,exynos4210-ehci",
60 		NULL
61 	};
62 	struct fdt_attach_args * const faa = aux;
63 
64 	return of_match_compatible(faa->faa_phandle, compatible);
65 }
66 
67 static void
68 exynos_ehci_attach(device_t parent, device_t self, void *aux)
69 {
70 	struct ehci_softc * const sc = device_private(self);
71 	struct fdt_attach_args * const faa = aux;
72 	const int phandle = faa->faa_phandle;
73 	struct fdtbus_phy *phy;
74 	struct clk *clk;
75 	char intrstr[128];
76 	bus_addr_t addr;
77 	bus_size_t size;
78 	int error, child;
79 	void *ih;
80 
81 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
82 		aprint_error(": couldn't get registers\n");
83 		return;
84 	}
85 
86 	/* Enable clocks */
87 	clk = fdtbus_clock_get(phandle, "usbhost");
88 	if (clk == NULL || clk_enable(clk) != 0) {
89 		aprint_error(": couldn't enable clock\n");
90 		return;
91 	}
92 
93 	/* Enable phys for each port */
94 	for (child = OF_child(phandle); child; child = OF_peer(child)) {
95 		phy = fdtbus_phy_get_index(child, 0);
96 		if (phy && fdtbus_phy_enable(phy, true) != 0)
97 			aprint_error(": couldn't enable phy for %s\n",
98 			    fdtbus_get_string(child, "name"));
99 	}
100 
101 	sc->sc_dev = self;
102 	sc->sc_bus.ub_hcpriv = sc;
103 	sc->sc_bus.ub_dmatag = faa->faa_dmat;
104 	sc->sc_bus.ub_revision = USBREV_2_0;
105 	if (of_hasprop(phandle, "has-transaction-translator"))
106 		sc->sc_flags |= EHCIF_ETTF;
107 	else
108 		sc->sc_ncomp = 1;
109 	sc->sc_size = size;
110 	sc->iot = faa->faa_bst;
111 	if (bus_space_map(sc->iot, addr, size, 0, &sc->ioh) != 0) {
112 		aprint_error(": couldn't map registers\n");
113 		return;
114 	}
115 
116 	aprint_naive("\n");
117 	aprint_normal(": Exynos EHCI\n");
118 
119 	/* Disable interrupts */
120 	sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
121 	EOWRITE4(sc, EHCI_USBINTR, 0);
122 
123 	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
124 		aprint_error_dev(self, "failed to decode interrupt\n");
125 		return;
126 	}
127 
128 	ih = fdtbus_intr_establish(phandle, 0, IPL_USB, FDT_INTR_MPSAFE,
129 	    ehci_intr, sc);
130 	if (ih == NULL) {
131 		aprint_error_dev(self, "couldn't establish interrupt on %s\n",
132 		    intrstr);
133 		return;
134 	}
135 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
136 
137 	error = ehci_init(sc);
138 	if (error) {
139 		aprint_error_dev(self, "init failed, error = %d\n", error);
140 		return;
141 	}
142 
143 	sc->sc_child = config_found(self, &sc->sc_bus, usbctlprint);
144 }
145