1/* $NetBSD: sa11x0_irq.S,v 1.18 2013/12/02 18:36:11 joerg Exp $ */ 2 3/* 4 * Copyright (c) 1998 Mark Brinicombe. 5 * Copyright (c) 1998 Causality Limited 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to the NetBSD Foundation 9 * by IWAMOTO Toshihiro. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Mark Brinicombe 22 * for the NetBSD Project. 23 * 4. The name of the company nor the name of the author may be used to 24 * endorse or promote products derived from this software without specific 25 * prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 30 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 31 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 32 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 */ 39 40#include "opt_irqstats.h" 41 42#include "assym.h" 43 44#include <arm/asm.h> 45#include <arm/locore.h> 46#include <arm/sa11x0/sa11x0_reg.h> 47 48 49 .text 50 .align 0 51 52Lspl_masks: 53 .word _C_LABEL(spl_masks) 54 55Lcpu_info_store: 56 .word _C_LABEL(cpu_info_store) 57 58 .globl _C_LABEL(saipic_base) 59_C_LABEL(saipic_base): 60 .word 0x00000000 61 62#ifdef INTR_DEBUG 63Ldbg_str: 64 .asciz "irq_entry %x %x\n" 65 .align 5 66#endif 67 68LOCK_CAS_CHECK_LOCALS 69 70AST_ALIGNMENT_FAULT_LOCALS 71 72/* 73 * Register usage 74 * 75 * r4 - Pointer to cpu_info 76 * r5 - Pointer to handler pointer list 77 * r6 - Address of current handler 78 * r7 - pspr mode 79 * r8 - Current IRQ requests. 80 * r9 - Used to count through possible IRQ bits. 81 * r10 - Base address of SAIP 82 */ 83 84ASENTRY_NP(irq_entry) 85 sub lr, lr, #0x00000004 /* Adjust the lr */ 86 87 PUSHFRAMEINSVC /* Push an interrupt frame */ 88 ENABLE_ALIGNMENT_FAULTS 89 90 /* Load r8 with the SAIPIC interrupt requests */ 91 92 ldr r10, _C_LABEL(saipic_base) 93 ldr r8, [r10, #(SAIPIC_IP)] /* Load IRQ pending register */ 94 95#ifdef INTR_DEBUG 96 ldr r2, [r10, #(SAIPIC_MR)] 97 adr r0, Ldbg_str 98 mov r1, r8 99 bl _C_LABEL(printf) 100#endif 101 /* 102 * Note that we have entered the IRQ handler. 103 * We are in SVC mode so we cannot use the processor mode 104 * to determine if we are in an IRQ. Instead we will count the 105 * each time the interrupt handler is nested. 106 */ 107 108 ldr r1, [r4, #CI_INTR_DEPTH] 109 add r1, r1, #1 110 str r1, [r4, #CI_INTR_DEPTH] 111 112 /* 113 * Need to block all interrupts at the IPL or lower for 114 * all asserted interrupts. 115 * This basically emulates hardware interrupt priority levels. 116 * Means we need to go through the interrupt mask and for 117 * every asserted interrupt we need to mask out all other 118 * interrupts at the same or lower IPL. 119 * If only we could wait until the main loop but we need to sort 120 * this out first so interrupts can be re-enabled. 121 * 122 * This would benefit from a special ffs type routine 123 */ 124 125 mov r9, #(NIPL - 1) 126 ldr r5, Lspl_masks 127 128Lfind_highest_ipl: 129 ldr r2, [r5, r9, lsl #2] 130 tst r8, r2 131 subeq r9, r9, #1 132 beq Lfind_highest_ipl 133 134 /* r9 = SPL level of highest priority interrupt */ 135 add r9, r9, #1 136 ldr r2, [r5, r9, lsl #2] 137 138 ldr r1, [r4, #CI_CPL] 139 str r9, [r4, #CI_CPL] 140 stmfd sp!, {r1} 141 142 /* Update the SAIP irq masks */ 143 bl _C_LABEL(irq_setmasks) 144 145#ifdef INTR_DEBUG 146 stmfd sp!, {r0,r1,r2} 147 adr r0, Ldbg_str 148 mov r1, #1 149 mov r2, r9 150 bl _C_LABEL(printf) 151 ldmia sp!, {r0,r1,r2} 152#endif 153 mrs r0, cpsr /* Enable IRQs */ 154 bic r0, r0, #I32_bit 155 msr cpsr_all, r0 156 157 ldr r5, Lirqhandlers 158 mov r9, #0x00000001 159 160irqloop: 161 /* This would benefit from a special ffs type routine */ 162 tst r8, r9 /* Is a bit set ? */ 163 beq nextirq /* No ? try next bit */ 164 165 ldr r6, [r5] /* Get address of first handler structure */ 166 167 teq r6, #0x00000000 /* Do we have a handler */ 168 moveq r0, r8 /* IRQ requests as arg 0 */ 169 beq _C_LABEL(stray_irqhandler) /* call special handler */ 170 171 ldr r0, [r4, #(CI_CC_NINTR)] 172 ldr r1, [r4, #(CI_CC_NINTR+4)] 173#ifdef _ARMEL 174 adds r0, r0, #0x00000001 175 adc r1, r1, #0x00000001 176#else 177 adds r1, r1, #0x00000001 178 adc r0, r0, #0x00000000 179#endif 180 str r0, [r4, #(CI_CC_NINTR)] 181 str r1, [r4, #(CI_CC_NINTR+4)] 182 183 /* 184 * XXX: Should stats be accumulated for every interrupt routine 185 * called or for every physical interrupt that is serviced. 186 */ 187 188#ifdef IRQSTATS 189 ldr r0, Lintrcnt 190 ldr r1, [r6, #(IH_COUNT)] 191 192 add r0, r0, r1, lsl #2 193 ldr r1, [r0] 194 add r1, r1, #0x00000001 195 str r1, [r0] 196#endif /* IRQSTATS */ 197 198irqchainloop: 199#ifdef INTR_DEBUG 200 stmfd sp!, {r0,r1,r2} 201 adr r0, Ldbg_str 202 mov r1, #2 203 bl _C_LABEL(printf) 204 ldmia sp!, {r0,r1,r2} 205#endif 206 ldr r0, [r6, #(IH_ARG)] /* Get argument pointer */ 207 teq r0, #0x00000000 /* If arg is zero pass stack frame */ 208 addeq r0, sp, #4 /* ... stack frame [XXX needs care] */ 209 mov lr, pc /* return address */ 210 ldr pc, [r6, #(IH_FUNC)] /* Call handler */ 211 212 teq r0, #0x00000001 /* Was the irq serviced ? */ 213 beq irqdone 214 215 ldr r6, [r6, #(IH_NEXT)] 216 teq r6, #0x00000000 217 bne irqchainloop 218 219irqdone: 220nextirq: 221 add r5, r5, #0x00000004 /* update pointer to handlers */ 222 mov r9, r9, lsl #1 /* move on to next bit */ 223 teq r9, #(1 << 31) /* done the last bit ? */ 224 bne irqloop /* no - loop back. */ 225 226 ldmfd sp!, {r2} 227 str r2, [r4, #CI_CPL] 228 229 /* Restore previous disabled mask */ 230 bl _C_LABEL(irq_setmasks) 231 232#ifdef __HAVE_FAST_SOFTINTS 233 bl _C_LABEL(dosoftints) /* Handle the soft interrupts */ 234#endif 235 236 /* Kill IRQ's in preparation for exit */ 237 mrs r0, cpsr 238 orr r0, r0, #(I32_bit) 239 msr cpsr_all, r0 240 241#ifdef INTR_DEBUG 242 adr r0, Ldbg_str 243 mov r1, #3 244 ldr r2, [r10, #(SAIPIC_MR)] 245 bl _C_LABEL(printf) 246#endif 247 248 /* Decrement the nest count */ 249 ldr r1, [r4, #CI_INTR_DEPTH] 250 sub r1, r1, #1 251 str r1, [r4, #CI_INTR_DEPTH] 252 253 LOCK_CAS_CHECK 254 255 DO_AST_AND_RESTORE_ALIGNMENT_FAULTS 256 PULLFRAMEFROMSVCANDEXIT 257 258 /* NOT REACHED */ 259 b . - 8 260 261ENTRY(irq_setmasks) 262 stmfd sp!, {r0, r1, r4, lr} /* Preserve registers */ 263 264 /* Disable interrupts */ 265 mrs r1, cpsr 266 orr r3, r1, #(I32_bit) 267 msr cpsr_all, r3 268 269 /* Calculate interrupt mask */ 270 ldr r0, Lspl_masks 271 ldr r4, Lcpu_info_store 272 ldr r2, [r4, #CI_CPL] 273 ldr r2, [r0, r2, lsl #2] 274 275 ldr r0, _C_LABEL(saipic_base) 276 str r2, [r0, #(SAIPIC_MR)] /* Set mask register */ 277 278 /* Restore old cpsr and exit */ 279 msr cpsr_all, r1 280 ldmia sp!, {r0, r1, r4, pc} /* Restore registers */ 281 282#ifdef IRQSTATS 283Lintrcnt: 284 .word _C_LABEL(intrcnt) 285#endif 286 287Lirqhandlers: 288 .word _C_LABEL(irqhandlers) /* Pointer to array of irqhandlers */ 289 290 291#ifdef IRQSTATS 292 .global _C_LABEL(intrnames), _C_LABEL(eintrnames) 293 .global _C_LABEL(eintrcnt) 294_C_LABEL(intrnames): 295_C_LABEL(eintrnames): 296_C_LABEL(eintrcnt): 297 298 .globl _C_LABEL(intrcnt), _C_LABEL(sintrcnt) 299 300_C_LABEL(intrcnt): 301 .space ICU_LEN*4 /* XXX Should be linked to number of interrupts */ 302 303_C_LABEL(sintrcnt): 304 .space 32*4 305#endif 306