xref: /netbsd-src/sys/arch/arm/s3c2xx0/s3c2410_extint.c (revision bdc22b2e01993381dcefeff2bc9b56ca75a4235c)
1 /* $NetBSD: s3c2410_extint.c,v 1.13 2012/10/27 17:17:40 chs Exp $ */
2 
3 /*
4  * Copyright (c) 2003  Genetec corporation.  All rights reserved.
5  * Written by Hiroyuki Bessho for Genetec corporation.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. The name of Genetec corporation may not be used to endorse
16  *    or promote products derived from this software without specific prior
17  *    written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY GENETEC CORP. ``AS IS'' AND
20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORP.
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * device driver to handle cascaded external interrupts of S3C2410.
34  *
35  * EXTINT [8..23] are cascaded to IRQ #5
36  * EXTINT [4..7] are cascaded to IRQ #4
37  * EXTINT [0..3] are not cascaded and connected directly as IRQ #[0..3].
38  * EXTINT [0..3] are handled by main interrupt handler in s3c2410_intr.c.
39  */
40 
41 #include <sys/cdefs.h>
42 __KERNEL_RCSID(0, "$NetBSD: s3c2410_extint.c,v 1.13 2012/10/27 17:17:40 chs Exp $");
43 
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <sys/malloc.h>
47 #include <uvm/uvm_extern.h>
48 #include <sys/bus.h>
49 #include <machine/intr.h>
50 #include <arm/cpufunc.h>
51 
52 #include <arm/s3c2xx0/s3c2410reg.h>
53 #include <arm/s3c2xx0/s3c2410var.h>
54 
55 #include "locators.h"
56 #include "opt_s3c2410.h"	/* for S3C2410_EXTINT_MAX */
57 
58 #ifndef	S3C2410_EXTINT_MAX
59 #define S3C2410_EXTINT_MAX  23
60 #endif
61 
62 #define	EXTINT_CASCADE_MIN	4
63 
64 #if S3C2410_EXTINT_MAX < EXTINT_CASCADE_MIN
65 #error "Don't enable ssextio if you don't use extint[4..23]."
66 #endif
67 
68 #define	N_EXTINT	(S3C2410_EXTINT_MAX - EXTINT_CASCADE_MIN +1)
69 
70 struct ssextio_softc {
71 	bus_space_tag_t sc_iot;
72 	bus_space_handle_t sc_ioh;
73 
74 	uint32_t   sc_pending;
75 	uint32_t   sc_mask;
76 
77 	struct extint_handler {
78 		int (* func)(void *);
79 		void *arg;
80 		void *sh;		/* softintr handler */
81 		int level;		/* IPL */
82 	} sc_handler[N_EXTINT];
83 
84 };
85 
86 static struct	ssextio_softc *ssextio_softc = NULL;
87 
88 /* cookies */
89 #define	EXTINT_4_7	1
90 #define	EXTINT_8_23	2
91 
92 /* prototypes */
93 static int	ssextio_match(device_t, cfdata_t, void *);
94 static void	ssextio_attach(device_t, device_t, void *);
95 static int 	ssextio_search(device_t, cfdata_t, const int *, void *);
96 static int	ssextio_print(void *, const char *);
97 
98 static int	ssextio_cascaded_intr(void *);
99 static void	ssextio_softintr(void *);
100 
101 static inline void
102 update_hw_mask(void)
103 {
104 	bus_space_write_4(ssextio_softc->sc_iot, ssextio_softc->sc_ioh,
105 	    GPIO_EINTMASK, ssextio_softc->sc_mask | ssextio_softc->sc_pending);
106 }
107 
108 
109 /* attach structures */
110 CFATTACH_DECL_NEW(ssextio, sizeof(struct ssextio_softc), ssextio_match, ssextio_attach,
111     NULL, NULL);
112 
113 static int
114 ssextio_print(void *aux, const char *name)
115 {
116 	struct s3c2xx0_attach_args *sa = aux;
117 
118 	if (sa->sa_addr != SSEXTIOCF_ADDR_DEFAULT)
119                 aprint_normal(" addr 0x%lx", sa->sa_addr);
120         if (sa->sa_intr > 0)
121                 aprint_normal(" intr %d", sa->sa_intr);
122         return (UNCONF);
123 }
124 
125 int
126 ssextio_match(device_t parent, cfdata_t match, void *aux)
127 {
128 #if S3C2410_EXTINT_MAX < 4
129 	/* better not configure this driver */
130 	return 0;
131 #else
132 	if (ssextio_softc != NULL)
133 		return 0;
134 
135 	return 1;
136 #endif
137 }
138 
139 void
140 ssextio_attach(device_t parent, device_t self, void *aux)
141 {
142 	struct ssextio_softc *sc = device_private(self);
143 	struct s3c24x0_softc *cpuc = ((struct s3c2xx0_attach_args *)aux)->sa_sc;
144 
145 	aprint_normal("\n");
146 
147 	ssextio_softc = sc;
148 
149 	sc->sc_iot = cpuc->sc_sx.sc_iot;
150 	sc->sc_ioh = cpuc->sc_sx.sc_gpio_ioh;
151 
152 	sc->sc_pending = 0;
153 	sc->sc_mask = ~0;
154 
155 	s3c24x0_intr_establish(S3C2410_INT_4_7, IPL_HIGH, IST_NONE,
156 	    ssextio_cascaded_intr, (void *)EXTINT_4_7);
157 #if S3C2410_EXTINT_MAX >= 8
158 	s3c24x0_intr_establish(S3C2410_INT_8_23, IPL_HIGH, IST_NONE,
159 	    ssextio_cascaded_intr, (void *)EXTINT_8_23);
160 #endif
161 	/*
162 	 *  Attach each devices
163 	 */
164 	config_search_ia(ssextio_search, self, "ssextio", NULL);
165 }
166 
167 static int
168 ssextio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
169 {
170 	struct ssextio_softc *sc = device_private(parent);
171 	struct s3c24x0_softc *cpuc = device_private(device_parent(parent));
172 	struct s3c2xx0_attach_args sa;
173 
174 	sa.sa_sc = sc;
175         sa.sa_iot = sc->sc_iot;
176         sa.sa_addr = cf->cf_loc[SSEXTIOCF_ADDR];
177         sa.sa_size = cf->cf_loc[SSEXTIOCF_SIZE];
178         sa.sa_intr = cf->cf_loc[SSEXTIOCF_INTR];
179 	sa.sa_dmat = cpuc->sc_sx.sc_dmat;
180 
181         if (config_match(parent, cf, &sa))
182                 config_attach(parent, cf, &sa, ssextio_print);
183 
184         return 0;
185 }
186 
187 void *
188 s3c2410_extint_establish(int extint, int ipl, int type,
189     int (*func)(void *), void *arg)
190 {
191 	int save;
192 	int idx;
193 	int soft_level;
194 
195 	if (extint < 0 || N_EXTINT <= extint)
196 		panic("Bad interrupt no for extio");
197 
198 	if (extint < EXTINT_CASCADE_MIN) {
199 		/*
200 		 * EXINT[0..3] are not cascaded. they are handled by
201 		 * the main interrupt controller.
202 		 */
203 		return s3c24x0_intr_establish(extint, ipl, type, func, arg);
204 	}
205 
206 	soft_level = SOFTINT_SERIAL;
207 
208 	idx = extint - EXTINT_CASCADE_MIN;
209 
210 	save = disable_interrupts(I32_bit);
211 
212 	ssextio_softc->sc_handler[idx].func = func;
213 	ssextio_softc->sc_handler[idx].arg = arg;
214 	ssextio_softc->sc_handler[idx].level = ipl;
215 
216 	ssextio_softc->sc_handler[idx].sh = softint_establish(soft_level,
217 	    ssextio_softintr, &ssextio_softc->sc_handler[idx]);
218 
219 	s3c2410_setup_extint(extint, type);
220 
221 	bus_space_write_4(ssextio_softc->sc_iot, ssextio_softc->sc_ioh,
222 			  GPIO_EINTPEND, 1U << extint);
223 	ssextio_softc->sc_mask &= ~(1U << extint);
224 	update_hw_mask();
225 
226 	restore_interrupts(save);
227 	return &ssextio_softc->sc_handler[idx];
228 }
229 
230 
231 static int
232 ssextio_cascaded_intr(void *cookie)
233 {
234 	uint32_t pending_mask, pending;
235 	int int_min;
236 	bus_space_tag_t iot = ssextio_softc->sc_iot;
237 	bus_space_handle_t ioh = ssextio_softc->sc_ioh;
238 	int save, i;
239 
240 	switch((int)cookie) {
241 	case EXTINT_4_7:
242 		pending_mask = 0x000000f0;
243 		int_min = 4;
244 		break;
245 
246 	case EXTINT_8_23:
247 		pending_mask = 0x00ffff00;
248 		int_min = 8;
249 		break;
250 
251 	default:
252 		panic("Bad cookie for %s", __func__);
253 	}
254 
255 
256 	save = disable_interrupts(I32_bit);
257 	pending = pending_mask & bus_space_read_4(iot, ioh, GPIO_EINTPEND);
258 	pending &= ~ssextio_softc->sc_mask;
259 	ssextio_softc->sc_pending |= pending;
260 	/* disable the extint until the handler is called. */
261 	update_hw_mask();
262 	restore_interrupts(save);
263 
264 	for (i=int_min; pending; ++i) {
265 		if (pending & (1<<i)) {
266 			assert(ssextio_softc->sc_handler[i-EXTINT_CASCADE_MIN].sh != NULL);
267 
268 			softint_schedule(
269 			    ssextio_softc->sc_handler[i-EXTINT_CASCADE_MIN].sh);
270 			pending &= ~ (1<<i);
271 		}
272 	}
273 
274 	return 1;
275 }
276 
277 static void
278 ssextio_softintr(void *cookie)
279 {
280 	struct extint_handler *h = cookie;
281 	int extint = EXTINT_CASCADE_MIN + h - ssextio_softc->sc_handler;
282 	int s, save;
283 
284 	save = disable_interrupts(I32_bit);
285 	/* clear hardware pending bits */
286 	bus_space_write_4(ssextio_softc->sc_iot, ssextio_softc->sc_ioh,
287 	    GPIO_EINTPEND, 1<<extint);
288 	ssextio_softc->sc_pending &= ~(1<<extint);
289 	update_hw_mask();
290 	restore_interrupts(save);
291 
292 	s = _splraise(h->level);
293 	h->func(h->arg);
294 	splx(s);
295 }
296