xref: /netbsd-src/sys/arch/arm/rockchip/rk_platform.c (revision 53b02e147d4ed531c0d2a5ca9b3e8026ba3e99b5)
1 /* $NetBSD: rk_platform.c,v 1.15 2021/11/12 22:02:08 jmcneill Exp $ */
2 
3 /*-
4  * Copyright (c) 2018,2021 Jared McNeill <jmcneill@invisible.ca>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include "opt_soc.h"
30 #include "opt_multiprocessor.h"
31 #include "opt_console.h"
32 
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: rk_platform.c,v 1.15 2021/11/12 22:02:08 jmcneill Exp $");
35 
36 #include <sys/param.h>
37 #include <sys/bus.h>
38 #include <sys/cpu.h>
39 #include <sys/device.h>
40 #include <sys/termios.h>
41 
42 
43 #include <dev/fdt/fdtvar.h>
44 #include <arm/fdt/arm_fdtvar.h>
45 
46 #include <uvm/uvm_extern.h>
47 
48 #include <machine/bootconfig.h>
49 #include <arm/cpufunc.h>
50 
51 #include <arm/cortex/gtmr_var.h>
52 
53 #include <dev/ic/ns16550reg.h>
54 #include <dev/ic/comreg.h>
55 
56 #include <arm/arm/psci.h>
57 #include <arm/fdt/psci_fdtvar.h>
58 
59 #include <libfdt.h>
60 
61 extern struct arm32_bus_dma_tag arm_generic_dma_tag;
62 extern struct bus_space arm_generic_bs_tag;
63 
64 static void
65 rk_platform_init_attach_args(struct fdt_attach_args *faa)
66 {
67 	faa->faa_bst = &arm_generic_bs_tag;
68 	faa->faa_dmat = &arm_generic_dma_tag;
69 }
70 
71 static void
72 rk_platform_device_register(device_t self, void *aux)
73 {
74 }
75 
76 static void
77 rk_platform_bootstrap(void)
78 {
79 	void *fdt_data = __UNCONST(fdtbus_get_data());
80 
81 	arm_fdt_cpu_bootstrap();
82 
83 	const int chosen_off = fdt_path_offset(fdt_data, "/chosen");
84 	if (chosen_off < 0)
85 		return;
86 
87 	if (match_bootconf_option(boot_args, "console", "fb")) {
88 		const int framebuffer_off =
89 		    fdt_path_offset(fdt_data, "/chosen/framebuffer");
90 		if (framebuffer_off >= 0) {
91 			const char *status = fdt_getprop(fdt_data,
92 			    framebuffer_off, "status", NULL);
93 			if (status == NULL || strncmp(status, "ok", 2) == 0) {
94 				fdt_setprop_string(fdt_data, chosen_off,
95 				    "stdout-path", "/chosen/framebuffer");
96 			}
97 		}
98 	} else if (match_bootconf_option(boot_args, "console", "serial")) {
99 		fdt_setprop_string(fdt_data, chosen_off,
100 		    "stdout-path", "serial0:115200n8");
101 	}
102 }
103 
104 #ifdef SOC_RK3288
105 
106 #define	RK3288_WDT_BASE		0xff800000
107 #define	RK3288_WDT_SIZE		0x10000
108 
109 #define	RK3288_WDT_CR		0x0000
110 #define	 RK3288_WDT_CR_WDT_EN		__BIT(0)
111 #define	RK3288_WDT_TORR		0x0004
112 #define	RK3288_WDT_CRR		0x000c
113 #define	 RK3288_WDT_MAGIC		0x76
114 
115 static bus_space_handle_t rk3288_wdt_bsh;
116 
117 #include <arm/rockchip/rk3288_platform.h>
118 
119 static const struct pmap_devmap *
120 rk3288_platform_devmap(void)
121 {
122 	static const struct pmap_devmap devmap[] = {
123 		DEVMAP_ENTRY(RK3288_CORE_VBASE,
124 			     RK3288_CORE_PBASE,
125 			     RK3288_CORE_SIZE),
126 		DEVMAP_ENTRY_END
127 	};
128 
129 	return devmap;
130 }
131 
132 void rk3288_platform_early_putchar(char);
133 
134 void __noasan
135 rk3288_platform_early_putchar(char c)
136 {
137 #ifdef CONSADDR
138 #define CONSADDR_VA	((CONSADDR - RK3288_CORE_PBASE) + RK3288_CORE_VBASE)
139 	volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ?
140 	    (volatile uint32_t *)CONSADDR_VA :
141 	    (volatile uint32_t *)CONSADDR;
142 
143 	while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0)
144 		;
145 
146 	uartaddr[com_data] = htole32(c);
147 #undef CONSADDR_VA
148 #endif
149 }
150 
151 static void
152 rk3288_platform_bootstrap(void)
153 {
154 	bus_space_tag_t bst = &arm_generic_bs_tag;
155 
156 	rk_platform_bootstrap();
157 	bus_space_map(bst, RK3288_WDT_BASE, RK3288_WDT_SIZE, 0, &rk3288_wdt_bsh);
158 }
159 
160 static void
161 rk3288_platform_reset(void)
162 {
163 	bus_space_tag_t bst = &arm_generic_bs_tag;
164 
165 	bus_space_write_4(bst, rk3288_wdt_bsh, RK3288_WDT_TORR, 0);
166 	bus_space_write_4(bst, rk3288_wdt_bsh, RK3288_WDT_CRR, RK3288_WDT_MAGIC);
167 	for (;;) {
168 		bus_space_write_4(bst, rk3288_wdt_bsh, RK3288_WDT_CR, RK3288_WDT_CR_WDT_EN);
169 	}
170 }
171 
172 static u_int
173 rk3288_platform_uart_freq(void)
174 {
175 	return RK3288_UART_FREQ;
176 }
177 
178 static const struct arm_platform rk3288_platform = {
179 	.ap_devmap = rk3288_platform_devmap,
180 	.ap_bootstrap = rk3288_platform_bootstrap,
181 	.ap_init_attach_args = rk_platform_init_attach_args,
182 	.ap_device_register = rk_platform_device_register,
183 	.ap_reset = rk3288_platform_reset,
184 	.ap_delay = gtmr_delay,
185 	.ap_uart_freq = rk3288_platform_uart_freq,
186 	.ap_mpstart = arm_fdt_cpu_mpstart,
187 };
188 
189 ARM_PLATFORM(rk3288, "rockchip,rk3288", &rk3288_platform);
190 #endif /* SOC_RK3288 */
191 
192 
193 #ifdef SOC_RK3328
194 
195 #include <arm/rockchip/rk3328_platform.h>
196 
197 static const struct pmap_devmap *
198 rk3328_platform_devmap(void)
199 {
200 	static const struct pmap_devmap devmap[] = {
201 		DEVMAP_ENTRY(RK3328_CORE_VBASE,
202 			     RK3328_CORE_PBASE,
203 			     RK3328_CORE_SIZE),
204 		DEVMAP_ENTRY_END
205 	};
206 
207 	return devmap;
208 }
209 
210 void rk3328_platform_early_putchar(char);
211 
212 void __noasan
213 rk3328_platform_early_putchar(char c)
214 {
215 #ifdef CONSADDR
216 #define CONSADDR_VA	((CONSADDR - RK3328_CORE_PBASE) + RK3328_CORE_VBASE)
217 	volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ?
218 	    (volatile uint32_t *)CONSADDR_VA :
219 	    (volatile uint32_t *)CONSADDR;
220 
221 	while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0)
222 		;
223 
224 	uartaddr[com_data] = htole32(c);
225 #undef CONSADDR_VA
226 #endif
227 }
228 
229 static u_int
230 rk3328_platform_uart_freq(void)
231 {
232 	return RK3328_UART_FREQ;
233 }
234 
235 static const struct arm_platform rk3328_platform = {
236 	.ap_devmap = rk3328_platform_devmap,
237 	.ap_bootstrap = rk_platform_bootstrap,
238 	.ap_init_attach_args = rk_platform_init_attach_args,
239 	.ap_device_register = rk_platform_device_register,
240 	.ap_reset = psci_fdt_reset,
241 	.ap_delay = gtmr_delay,
242 	.ap_uart_freq = rk3328_platform_uart_freq,
243 	.ap_mpstart = arm_fdt_cpu_mpstart,
244 };
245 
246 ARM_PLATFORM(rk3328, "rockchip,rk3328", &rk3328_platform);
247 
248 #endif /* SOC_RK3328 */
249 
250 
251 #ifdef SOC_RK3399
252 
253 #include <arm/rockchip/rk3399_platform.h>
254 
255 static const struct pmap_devmap *
256 rk3399_platform_devmap(void)
257 {
258 	static const struct pmap_devmap devmap[] = {
259 		DEVMAP_ENTRY(RK3399_CORE_VBASE,
260 			     RK3399_CORE_PBASE,
261 			     RK3399_CORE_SIZE),
262 		DEVMAP_ENTRY_END
263 	};
264 
265 	return devmap;
266 }
267 
268 void rk3399_platform_early_putchar(char);
269 
270 void
271 rk3399_platform_early_putchar(char c)
272 {
273 #ifdef CONSADDR
274 #define CONSADDR_VA	((CONSADDR - RK3399_CORE_PBASE) + RK3399_CORE_VBASE)
275 	volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ?
276 	    (volatile uint32_t *)CONSADDR_VA :
277 	    (volatile uint32_t *)CONSADDR;
278 
279 	while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0)
280 		;
281 
282 	uartaddr[com_data] = htole32(c);
283 #undef CONSADDR_VA
284 #endif
285 }
286 
287 static u_int
288 rk3399_platform_uart_freq(void)
289 {
290 	return RK3399_UART_FREQ;
291 }
292 
293 static const struct arm_platform rk3399_platform = {
294 	.ap_devmap = rk3399_platform_devmap,
295 	.ap_bootstrap = rk_platform_bootstrap,
296 	.ap_init_attach_args = rk_platform_init_attach_args,
297 	.ap_device_register = rk_platform_device_register,
298 	.ap_reset = psci_fdt_reset,
299 	.ap_delay = gtmr_delay,
300 	.ap_uart_freq = rk3399_platform_uart_freq,
301 	.ap_mpstart = arm_fdt_cpu_mpstart,
302 };
303 
304 ARM_PLATFORM(rk3399, "rockchip,rk3399", &rk3399_platform);
305 
306 #endif /* SOC_RK3399 */
307