1*a515ac42Sjmcneill /* $NetBSD: rk_cru_mux.c,v 1.2 2018/06/30 17:54:07 jmcneill Exp $ */
26726462dSjmcneill
36726462dSjmcneill /*-
46726462dSjmcneill * Copyright (c) 2018 Jared McNeill <jmcneill@invisible.ca>
56726462dSjmcneill * All rights reserved.
66726462dSjmcneill *
76726462dSjmcneill * Redistribution and use in source and binary forms, with or without
86726462dSjmcneill * modification, are permitted provided that the following conditions
96726462dSjmcneill * are met:
106726462dSjmcneill * 1. Redistributions of source code must retain the above copyright
116726462dSjmcneill * notice, this list of conditions and the following disclaimer.
126726462dSjmcneill * 2. Redistributions in binary form must reproduce the above copyright
136726462dSjmcneill * notice, this list of conditions and the following disclaimer in the
146726462dSjmcneill * documentation and/or other materials provided with the distribution.
156726462dSjmcneill *
166726462dSjmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
176726462dSjmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
186726462dSjmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
196726462dSjmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
206726462dSjmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
216726462dSjmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
226726462dSjmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
236726462dSjmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
246726462dSjmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
256726462dSjmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
266726462dSjmcneill * SUCH DAMAGE.
276726462dSjmcneill */
286726462dSjmcneill
296726462dSjmcneill #include <sys/cdefs.h>
30*a515ac42Sjmcneill __KERNEL_RCSID(0, "$NetBSD: rk_cru_mux.c,v 1.2 2018/06/30 17:54:07 jmcneill Exp $");
316726462dSjmcneill
326726462dSjmcneill #include <sys/param.h>
336726462dSjmcneill #include <sys/bus.h>
346726462dSjmcneill
356726462dSjmcneill #include <dev/clk/clk_backend.h>
366726462dSjmcneill
376726462dSjmcneill #include <arm/rockchip/rk_cru.h>
386726462dSjmcneill
396726462dSjmcneill const char *
rk_cru_mux_get_parent(struct rk_cru_softc * sc,struct rk_cru_clk * clk)406726462dSjmcneill rk_cru_mux_get_parent(struct rk_cru_softc *sc,
416726462dSjmcneill struct rk_cru_clk *clk)
426726462dSjmcneill {
436726462dSjmcneill struct rk_cru_mux *mux = &clk->u.mux;
446726462dSjmcneill const bool mux_grf = (mux->flags & RK_MUX_GRF) != 0;
45*a515ac42Sjmcneill uint32_t val;
466726462dSjmcneill
476726462dSjmcneill KASSERT(clk->type == RK_CRU_MUX);
486726462dSjmcneill
49*a515ac42Sjmcneill if (mux_grf) {
50*a515ac42Sjmcneill if (!HAS_GRF(sc))
516726462dSjmcneill return NULL;
52*a515ac42Sjmcneill syscon_lock(sc->sc_grf);
53*a515ac42Sjmcneill val = syscon_read_4(sc->sc_grf, mux->reg);
54*a515ac42Sjmcneill syscon_unlock(sc->sc_grf);
55*a515ac42Sjmcneill } else {
56*a515ac42Sjmcneill val = CRU_READ(sc, mux->reg);
57*a515ac42Sjmcneill }
586726462dSjmcneill const u_int index = __SHIFTOUT(val, mux->mask);
596726462dSjmcneill
606726462dSjmcneill return mux->parents[index];
616726462dSjmcneill }
626726462dSjmcneill
636726462dSjmcneill int
rk_cru_mux_set_parent(struct rk_cru_softc * sc,struct rk_cru_clk * clk,const char * parent)646726462dSjmcneill rk_cru_mux_set_parent(struct rk_cru_softc *sc,
656726462dSjmcneill struct rk_cru_clk *clk, const char *parent)
666726462dSjmcneill {
676726462dSjmcneill struct rk_cru_mux *mux = &clk->u.mux;
686726462dSjmcneill const bool mux_grf = (mux->flags & RK_MUX_GRF) != 0;
696726462dSjmcneill
706726462dSjmcneill KASSERT(clk->type == RK_CRU_MUX);
716726462dSjmcneill
726726462dSjmcneill if (mux_grf && !HAS_GRF(sc))
736726462dSjmcneill return ENXIO;
746726462dSjmcneill
756726462dSjmcneill for (u_int index = 0; index < mux->nparents; index++) {
766726462dSjmcneill if (strcmp(mux->parents[index], parent) == 0) {
776726462dSjmcneill const uint32_t write_mask = mux->mask << 16;
786726462dSjmcneill const uint32_t write_val = __SHIFTIN(index, mux->mask);
796726462dSjmcneill
80*a515ac42Sjmcneill if (mux_grf) {
81*a515ac42Sjmcneill syscon_lock(sc->sc_grf);
82*a515ac42Sjmcneill syscon_write_4(sc->sc_grf, mux->reg, write_mask | write_val);
83*a515ac42Sjmcneill syscon_unlock(sc->sc_grf);
84*a515ac42Sjmcneill } else
856726462dSjmcneill CRU_WRITE(sc, mux->reg, write_mask | write_val);
866726462dSjmcneill
876726462dSjmcneill return 0;
886726462dSjmcneill }
896726462dSjmcneill }
906726462dSjmcneill
916726462dSjmcneill return EINVAL;
926726462dSjmcneill }
93