1 /* $NetBSD: ofw_irqhandler.c,v 1.13 2008/01/06 03:45:27 matt Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Mark Brinicombe 21 * for the NetBSD Project. 22 * 4. The name of the company nor the name of the author may be used to 23 * endorse or promote products derived from this software without specific 24 * prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 27 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 28 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 29 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 30 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 31 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 35 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * from: irqhandler.c 38 * 39 * IRQ/FIQ initialisation, claim, release and handler routines 40 * 41 * Created : 30/09/94 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: ofw_irqhandler.c,v 1.13 2008/01/06 03:45:27 matt Exp $"); 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/syslog.h> 50 #include <sys/malloc.h> 51 52 #include <uvm/uvm_extern.h> 53 54 #include <machine/intr.h> 55 #include <machine/irqhandler.h> 56 #include <machine/cpu.h> 57 58 irqhandler_t *irqhandlers[NIRQS]; 59 60 u_int current_mask; 61 u_int actual_mask; 62 u_int disabled_mask; 63 u_int irqmasks[IPL_LEVELS]; 64 extern u_int intrcnt[]; 65 66 extern char *_intrnames; 67 68 /* Prototypes */ 69 70 int podule_irqhandler __P((void)); 71 extern void set_spl_masks __P((void)); 72 73 /* 74 * void irq_init(void) 75 * 76 * Initialise the IRQ/FIQ sub system 77 */ 78 79 void 80 irq_init() 81 { 82 int loop; 83 84 /* Clear all the IRQ handlers and the irq block masks */ 85 for (loop = 0; loop < NIRQS; ++loop) { 86 irqhandlers[loop] = NULL; 87 } 88 89 /* 90 * Setup the irqmasks for the different Interrupt Priority Levels 91 * We will start with no bits set and these will be updated as handlers 92 * are installed at different IPL's. 93 */ 94 for (loop = 0; loop < IPL_LEVELS; ++loop) 95 irqmasks[loop] = 0; 96 97 current_mask = 0x00000000; 98 disabled_mask = 0x00000000; 99 actual_mask = 0x00000000; 100 101 set_spl_masks(); 102 103 /* Enable IRQ's and FIQ's */ 104 enable_interrupts(I32_bit | F32_bit); 105 } 106 107 108 /* 109 * int irq_claim(int irq, irqhandler_t *handler) 110 * 111 * Enable an IRQ and install a handler for it. 112 */ 113 114 int 115 irq_claim(irq, handler, group, name) 116 int irq; 117 irqhandler_t *handler; 118 const char *group; 119 const char *name; 120 { 121 int level; 122 123 #ifdef DIAGNOSTIC 124 /* Sanity check */ 125 if (handler == NULL) 126 panic("NULL interrupt handler"); 127 if (handler->ih_func == NULL) 128 panic("Interrupt handler does not have a function"); 129 #endif /* DIAGNOSTIC */ 130 131 /* 132 * IRQ_INSTRUCT indicates that we should get the irq number 133 * from the irq structure 134 */ 135 if (irq == IRQ_INSTRUCT) 136 irq = handler->ih_num; 137 138 /* Make sure the irq number is valid */ 139 if (irq < 0 || irq >= NIRQS) 140 return(-1); 141 142 /* Make sure the level is valid */ 143 if (handler->ih_level < 0 || handler->ih_level >= IPL_LEVELS) 144 return(-1); 145 146 evcnt_attach_dynamic(&handler->ih_ev, EVCNT_TYPE_INTR, NULL, 147 group, name); 148 149 /* Attach handler at top of chain */ 150 handler->ih_next = irqhandlers[irq]; 151 irqhandlers[irq] = handler; 152 153 /* 154 * Reset the flags for this handler. 155 * As the handler is now in the chain mark it as active. 156 */ 157 handler->ih_flags = 0 | IRQ_FLAG_ACTIVE; 158 159 /* 160 * Record the interrupt number for accounting. 161 * Done here as the accounting number may not be the same as the 162 * IRQ number though for the moment they are 163 */ 164 handler->ih_num = irq; 165 166 /* 167 * Update the irq masks. 168 * Find the lowest interrupt priority on the irq chain. 169 * Interrupt is allowable at priorities lower than this. 170 * If ih_level is out of range then don't bother to update 171 * the masks. 172 */ 173 if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) { 174 irqhandler_t *ptr; 175 176 /* 177 * Find the lowest interrupt priority on the irq chain. 178 * Interrupt is allowable at priorities lower than this. 179 */ 180 ptr = irqhandlers[irq]; 181 if (ptr) { 182 level = ptr->ih_level - 1; 183 while (ptr) { 184 if (ptr->ih_level - 1 < level) 185 level = ptr->ih_level - 1; 186 ptr = ptr->ih_next; 187 } 188 while (level >= 0) { 189 irqmasks[level] |= (1 << irq); 190 --level; 191 } 192 } 193 194 #include "sl.h" 195 #include "ppp.h" 196 #if NSL > 0 || NPPP > 0 197 /* In the presence of SLIP or PPP, splimp > spltty. */ 198 irqmasks[IPL_NET] &= irqmasks[IPL_TTY]; 199 #endif 200 } 201 202 enable_irq(irq); 203 set_spl_masks(); 204 205 return(0); 206 } 207 208 209 /* 210 * int irq_release(int irq, irqhandler_t *handler) 211 * 212 * Disable an IRQ and remove a handler for it. 213 */ 214 215 int 216 irq_release(irq, handler) 217 int irq; 218 irqhandler_t *handler; 219 { 220 int level; 221 irqhandler_t *irqhand; 222 irqhandler_t **prehand; 223 224 /* 225 * IRQ_INSTRUCT indicates that we should get the irq number 226 * from the irq structure 227 */ 228 if (irq == IRQ_INSTRUCT) 229 irq = handler->ih_num; 230 231 /* Make sure the irq number is valid */ 232 if (irq < 0 || irq >= NIRQS) 233 return(-1); 234 235 /* Locate the handler */ 236 irqhand = irqhandlers[irq]; 237 prehand = &irqhandlers[irq]; 238 239 while (irqhand && handler != irqhand) { 240 prehand = &irqhand; 241 irqhand = irqhand->ih_next; 242 } 243 244 /* Remove the handler if located */ 245 if (irqhand) 246 *prehand = irqhand->ih_next; 247 else 248 return(-1); 249 250 /* Now the handler has been removed from the chain mark is as inactive */ 251 irqhand->ih_flags &= ~IRQ_FLAG_ACTIVE; 252 253 /* Make sure the head of the handler list is active */ 254 if (irqhandlers[irq]) 255 irqhandlers[irq]->ih_flags |= IRQ_FLAG_ACTIVE; 256 257 /* 258 * Update the irq masks. 259 * If ih_level is out of range then don't bother to update 260 * the masks. 261 */ 262 if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) { 263 irqhandler_t *ptr; 264 265 /* Clean the bit from all the masks */ 266 for (level = 0; level < IPL_LEVELS; ++level) 267 irqmasks[level] &= ~(1 << irq); 268 269 /* 270 * Find the lowest interrupt priority on the irq chain. 271 * Interrupt is allowable at priorities lower than this. 272 */ 273 ptr = irqhandlers[irq]; 274 if (ptr) { 275 level = ptr->ih_level - 1; 276 while (ptr) { 277 if (ptr->ih_level - 1 < level) 278 level = ptr->ih_level - 1; 279 ptr = ptr->ih_next; 280 } 281 while (level >= 0) { 282 irqmasks[level] |= (1 << irq); 283 --level; 284 } 285 } 286 } 287 288 /* 289 * Disable the appropriate mask bit if there are no handlers left for 290 * this IRQ. 291 */ 292 if (irqhandlers[irq] == NULL) 293 disable_irq(irq); 294 295 set_spl_masks(); 296 297 return(0); 298 } 299 300 301 void * 302 intr_claim(irq, level, ih_func, ih_arg, group, name) 303 int irq; 304 int level; 305 int (*ih_func) __P((void *)); 306 void *ih_arg; 307 const char *group; 308 const char *name; 309 { 310 irqhandler_t *ih; 311 312 ih = malloc(sizeof(*ih), M_DEVBUF, M_NOWAIT|M_ZERO); 313 if (!ih) 314 panic("intr_claim(): Cannot malloc handler memory"); 315 316 ih->ih_level = level; 317 ih->ih_func = ih_func; 318 ih->ih_arg = ih_arg; 319 ih->ih_flags = 0; 320 321 if (irq_claim(irq, ih, group, name) != 0) 322 return(NULL); 323 return(ih); 324 } 325 326 327 int 328 intr_release(arg) 329 void *arg; 330 { 331 irqhandler_t *ih = (irqhandler_t *)arg; 332 333 if (irq_release(ih->ih_num, ih) == 0) { 334 free(ih, M_DEVBUF); 335 return(0); 336 } 337 return(1); 338 } 339 340 341 /* 342 * void disable_irq(int irq) 343 * 344 * Disables a specific irq. The irq is removed from the master irq mask 345 */ 346 347 void 348 disable_irq(irq) 349 int irq; 350 { 351 register int oldirqstate; 352 353 oldirqstate = disable_interrupts(I32_bit); 354 current_mask &= ~(1 << irq); 355 irq_setmasks(); 356 restore_interrupts(oldirqstate); 357 } 358 359 360 /* 361 * void enable_irq(int irq) 362 * 363 * Enables a specific irq. The irq is added to the master irq mask 364 * This routine should be used with caution. A handler should already 365 * be installed. 366 */ 367 368 void 369 enable_irq(irq) 370 int irq; 371 { 372 register u_int oldirqstate; 373 374 oldirqstate = disable_interrupts(I32_bit); 375 current_mask |= (1 << irq); 376 irq_setmasks(); 377 restore_interrupts(oldirqstate); 378 } 379 380 381 /* 382 * void stray_irqhandler(u_int mask) 383 * 384 * Handler for stray interrupts. This gets called if a handler cannot be 385 * found for an interrupt. 386 */ 387 388 void stray_irqhandler(u_int); /* called from assembly */ 389 390 void 391 stray_irqhandler(mask) 392 u_int mask; 393 { 394 static u_int stray_irqs = 0; 395 396 if (++stray_irqs <= 8) 397 log(LOG_ERR, "Stray interrupt %08x%s\n", mask, 398 stray_irqs >= 8 ? ": stopped logging" : ""); 399 } 400