xref: /netbsd-src/sys/arch/arm/ofw/ofw_irqhandler.c (revision 23c8222edbfb0f0932d88a8351d3a0cf817dfb9e)
1 /*	$NetBSD: ofw_irqhandler.c,v 1.4 2004/08/29 17:36:46 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c) 1994-1998 Mark Brinicombe.
5  * Copyright (c) 1994 Brini.
6  * All rights reserved.
7  *
8  * This code is derived from software written for Brini by Mark Brinicombe
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by Mark Brinicombe
21  *	for the NetBSD Project.
22  * 4. The name of the company nor the name of the author may be used to
23  *    endorse or promote products derived from this software without specific
24  *    prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
27  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
28  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
30  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
31  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
35  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  *
37  *	from: irqhandler.c
38  *
39  * IRQ/FIQ initialisation, claim, release and handler routines
40  *
41  * Created      : 30/09/94
42  */
43 
44 #include <sys/cdefs.h>
45 __KERNEL_RCSID(0, "$NetBSD: ofw_irqhandler.c,v 1.4 2004/08/29 17:36:46 thorpej Exp $");
46 
47 #include "opt_irqstats.h"
48 
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/syslog.h>
52 #include <sys/malloc.h>
53 
54 #include <uvm/uvm_extern.h>
55 
56 #include <machine/intr.h>
57 #include <machine/cpu.h>
58 
59 irqhandler_t *irqhandlers[NIRQS];
60 
61 int current_intr_depth;
62 u_int current_mask;
63 u_int actual_mask;
64 u_int disabled_mask;
65 u_int spl_mask;
66 u_int irqmasks[IPL_LEVELS];
67 u_int irqblock[NIRQS];
68 extern u_int intrcnt[];
69 
70 extern u_int soft_interrupts;	/* Only so we can initialise it */
71 
72 extern char *_intrnames;
73 
74 /* Prototypes */
75 
76 int podule_irqhandler		__P((void));
77 extern void set_spl_masks	__P((void));
78 
79 /*
80  * void irq_init(void)
81  *
82  * Initialise the IRQ/FIQ sub system
83  */
84 
85 void
86 irq_init()
87 {
88 	int loop;
89 
90 	/* Clear all the IRQ handlers and the irq block masks */
91 	for (loop = 0; loop < NIRQS; ++loop) {
92 		irqhandlers[loop] = NULL;
93 		irqblock[loop] = 0;
94 	}
95 
96 	/*
97 	 * Setup the irqmasks for the different Interrupt Priority Levels
98 	 * We will start with no bits set and these will be updated as handlers
99 	 * are installed at different IPL's.
100 	 */
101 	for (loop = 0; loop < IPL_LEVELS; ++loop)
102 		irqmasks[loop] = 0;
103 
104 	current_intr_depth = 0;
105 	current_mask = 0x00000000;
106 	disabled_mask = 0x00000000;
107 	actual_mask = 0x00000000;
108 	spl_mask = 0x00000000;
109 	soft_interrupts = 0x00000000;
110 
111 	set_spl_masks();
112 
113 	/* Enable IRQ's and FIQ's */
114 	enable_interrupts(I32_bit | F32_bit);
115 }
116 
117 
118 /*
119  * int irq_claim(int irq, irqhandler_t *handler)
120  *
121  * Enable an IRQ and install a handler for it.
122  */
123 
124 int
125 irq_claim(irq, handler)
126 	int irq;
127 	irqhandler_t *handler;
128 {
129 	int level;
130 	int loop;
131 
132 #ifdef DIAGNOSTIC
133 	/* Sanity check */
134 	if (handler == NULL)
135 		panic("NULL interrupt handler");
136 	if (handler->ih_func == NULL)
137 		panic("Interrupt handler does not have a function");
138 #endif	/* DIAGNOSTIC */
139 
140 	/*
141 	 * IRQ_INSTRUCT indicates that we should get the irq number
142 	 * from the irq structure
143 	 */
144 	if (irq == IRQ_INSTRUCT)
145 		irq = handler->ih_num;
146 
147 	/* Make sure the irq number is valid */
148 	if (irq < 0 || irq >= NIRQS)
149 		return(-1);
150 
151 	/* Make sure the level is valid */
152 	if (handler->ih_level < 0 || handler->ih_level >= IPL_LEVELS)
153     	        return(-1);
154 
155 	/* Attach handler at top of chain */
156 	handler->ih_next = irqhandlers[irq];
157 	irqhandlers[irq] = handler;
158 
159 	/*
160 	 * Reset the flags for this handler.
161 	 * As the handler is now in the chain mark it as active.
162 	 */
163 	handler->ih_flags = 0 | IRQ_FLAG_ACTIVE;
164 
165 	/*
166 	 * Record the interrupt number for accounting.
167 	 * Done here as the accounting number may not be the same as the
168 	 * IRQ number though for the moment they are
169 	 */
170 	handler->ih_num = irq;
171 
172 #ifdef IRQSTATS
173 	/* Get the interrupt name from the head of the list */
174 	if (handler->ih_name) {
175 		char *ptr = _intrnames + (irq * 14);
176 		strcpy(ptr, "             ");
177 		strncpy(ptr, handler->ih_name,
178 		    min(strlen(handler->ih_name), 13));
179 	} else {
180 		char *ptr = _intrnames + (irq * 14);
181 		sprintf(ptr, "irq %2d     ", irq);
182 	}
183 #endif	/* IRQSTATS */
184 
185 	/*
186 	 * Update the irq masks.
187 	 * Find the lowest interrupt priority on the irq chain.
188 	 * Interrupt is allowable at priorities lower than this.
189 	 * If ih_level is out of range then don't bother to update
190 	 * the masks.
191 	 */
192 	if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) {
193 		irqhandler_t *ptr;
194 
195 		/*
196 		 * Find the lowest interrupt priority on the irq chain.
197 		 * Interrupt is allowable at priorities lower than this.
198 		 */
199 		ptr = irqhandlers[irq];
200 		if (ptr) {
201 			level = ptr->ih_level - 1;
202 			while (ptr) {
203 				if (ptr->ih_level - 1 < level)
204 					level = ptr->ih_level - 1;
205 				ptr = ptr->ih_next;
206 			}
207 			while (level >= 0) {
208 				irqmasks[level] |= (1 << irq);
209 				--level;
210 			}
211 		}
212 
213 #include "sl.h"
214 #include "ppp.h"
215 #if NSL > 0 || NPPP > 0
216 		/* In the presence of SLIP or PPP, splimp > spltty. */
217 		irqmasks[IPL_NET] &= irqmasks[IPL_TTY];
218 #endif
219 	}
220 
221 	/*
222 	 * We now need to update the irqblock array. This array indicates
223 	 * what other interrupts should be blocked when interrupt is asserted
224 	 * This basically emulates hardware interrupt priorities e.g. by
225 	 * blocking all other IPL_BIO interrupts with an IPL_BIO interrupt
226 	 * is asserted. For each interrupt we find the highest IPL and set
227 	 * the block mask to the interrupt mask for that level.
228 	 */
229 
230 	for (loop = 0; loop < NIRQS; ++loop) {
231 		irqhandler_t *ptr;
232 
233 		ptr = irqhandlers[loop];
234 		if (ptr) {
235 			/* There is at least 1 handler so scan the chain */
236 			level = ptr->ih_level;
237 			while (ptr) {
238 				if (ptr->ih_level > level)
239 					level = ptr->ih_level;
240 				ptr = ptr->ih_next;
241 			}
242 			irqblock[loop] = ~irqmasks[level];
243 		} else
244 			/* No handlers for this irq so nothing to block */
245 			irqblock[loop] = 0;
246 	}
247 
248 	enable_irq(irq);
249 	set_spl_masks();
250 
251 	return(0);
252 }
253 
254 
255 /*
256  * int irq_release(int irq, irqhandler_t *handler)
257  *
258  * Disable an IRQ and remove a handler for it.
259  */
260 
261 int
262 irq_release(irq, handler)
263 	int irq;
264 	irqhandler_t *handler;
265 {
266 	int level;
267 	int loop;
268 	irqhandler_t *irqhand;
269 	irqhandler_t **prehand;
270 	extern char *_intrnames;
271 
272 	/*
273 	 * IRQ_INSTRUCT indicates that we should get the irq number
274 	 * from the irq structure
275 	 */
276 	if (irq == IRQ_INSTRUCT)
277 		irq = handler->ih_num;
278 
279 	/* Make sure the irq number is valid */
280 	if (irq < 0 || irq >= NIRQS)
281 		return(-1);
282 
283 	/* Locate the handler */
284 	irqhand = irqhandlers[irq];
285 	prehand = &irqhandlers[irq];
286 
287 	while (irqhand && handler != irqhand) {
288 		prehand = &irqhand;
289 		irqhand = irqhand->ih_next;
290 	}
291 
292 	/* Remove the handler if located */
293 	if (irqhand)
294 		*prehand = irqhand->ih_next;
295 	else
296 		return(-1);
297 
298 	/* Now the handler has been removed from the chain mark is as inactive */
299 	irqhand->ih_flags &= ~IRQ_FLAG_ACTIVE;
300 
301 	/* Make sure the head of the handler list is active */
302 	if (irqhandlers[irq])
303 		irqhandlers[irq]->ih_flags |= IRQ_FLAG_ACTIVE;
304 
305 #ifdef IRQSTATS
306 	/* Get the interrupt name from the head of the list */
307 	if (irqhandlers[irq] && irqhandlers[irq]->ih_name) {
308 		char *ptr = _intrnames + (irq * 14);
309 		strcpy(ptr, "             ");
310 		strncpy(ptr, irqhandlers[irq]->ih_name,
311 		    min(strlen(irqhandlers[irq]->ih_name), 13));
312 	} else {
313 		char *ptr = _intrnames + (irq * 14);
314 		sprintf(ptr, "irq %2d     ", irq);
315 	}
316 #endif	/* IRQSTATS */
317 
318 	/*
319 	 * Update the irq masks.
320 	 * If ih_level is out of range then don't bother to update
321 	 * the masks.
322 	 */
323 	if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) {
324 		irqhandler_t *ptr;
325 
326 		/* Clean the bit from all the masks */
327 		for (level = 0; level < IPL_LEVELS; ++level)
328 			irqmasks[level] &= ~(1 << irq);
329 
330 		/*
331 		 * Find the lowest interrupt priority on the irq chain.
332 		 * Interrupt is allowable at priorities lower than this.
333 		 */
334 		ptr = irqhandlers[irq];
335 		if (ptr) {
336 			level = ptr->ih_level - 1;
337 			while (ptr) {
338 				if (ptr->ih_level - 1 < level)
339 					level = ptr->ih_level - 1;
340 				ptr = ptr->ih_next;
341 			}
342 			while (level >= 0) {
343 				irqmasks[level] |= (1 << irq);
344 				--level;
345 			}
346 		}
347 	}
348 
349 	/*
350 	 * We now need to update the irqblock array. This array indicates
351 	 * what other interrupts should be blocked when interrupt is asserted
352 	 * This basically emulates hardware interrupt priorities e.g. by
353 	 * blocking all other IPL_BIO interrupts with an IPL_BIO interrupt
354 	 * is asserted. For each interrupt we find the highest IPL and set
355 	 * the block mask to the interrupt mask for that level.
356 	 */
357 	for (loop = 0; loop < NIRQS; ++loop) {
358 		irqhandler_t *ptr;
359 
360 		ptr = irqhandlers[loop];
361 		if (ptr) {
362 			/* There is at least 1 handler so scan the chain */
363 			level = ptr->ih_level;
364 			while (ptr) {
365 				if (ptr->ih_level > level)
366 					level = ptr->ih_level;
367 				ptr = ptr->ih_next;
368 			}
369 			irqblock[loop] = ~irqmasks[level];
370 		} else
371 			/* No handlers for this irq so nothing to block */
372 			irqblock[loop] = 0;
373 	}
374 
375 	/*
376 	 * Disable the appropriate mask bit if there are no handlers left for
377 	 * this IRQ.
378 	 */
379 	if (irqhandlers[irq] == NULL)
380 		disable_irq(irq);
381 
382 	set_spl_masks();
383 
384 	return(0);
385 }
386 
387 
388 void *
389 intr_claim(irq, level, name, ih_func, ih_arg)
390 	int irq;
391 	int level;
392 	const char *name;
393 	int (*ih_func) __P((void *));
394 	void *ih_arg;
395 {
396 	irqhandler_t *ih;
397 
398 	ih = malloc(sizeof(*ih), M_DEVBUF, M_NOWAIT);
399 	if (!ih)
400 		panic("intr_claim(): Cannot malloc handler memory");
401 
402 	ih->ih_level = level;
403 	ih->ih_name = name;
404 	ih->ih_func = ih_func;
405 	ih->ih_arg = ih_arg;
406 	ih->ih_flags = 0;
407 
408 	if (irq_claim(irq, ih) != 0)
409 		return(NULL);
410 	return(ih);
411 }
412 
413 
414 int
415 intr_release(arg)
416 	void *arg;
417 {
418 	irqhandler_t *ih = (irqhandler_t *)arg;
419 
420 	if (irq_release(ih->ih_num, ih) == 0) {
421 		free(ih, M_DEVBUF);
422 		return(0);
423 	}
424 	return(1);
425 }
426 
427 
428 /*
429  * void disable_irq(int irq)
430  *
431  * Disables a specific irq. The irq is removed from the master irq mask
432  */
433 
434 void
435 disable_irq(irq)
436 	int irq;
437 {
438 	register int oldirqstate;
439 
440 	oldirqstate = disable_interrupts(I32_bit);
441 	current_mask &= ~(1 << irq);
442 	irq_setmasks();
443 	restore_interrupts(oldirqstate);
444 }
445 
446 
447 /*
448  * void enable_irq(int irq)
449  *
450  * Enables a specific irq. The irq is added to the master irq mask
451  * This routine should be used with caution. A handler should already
452  * be installed.
453  */
454 
455 void
456 enable_irq(irq)
457 	int irq;
458 {
459 	register u_int oldirqstate;
460 
461 	oldirqstate = disable_interrupts(I32_bit);
462 	current_mask |= (1 << irq);
463 	irq_setmasks();
464 	restore_interrupts(oldirqstate);
465 }
466 
467 
468 /*
469  * void stray_irqhandler(u_int mask)
470  *
471  * Handler for stray interrupts. This gets called if a handler cannot be
472  * found for an interrupt.
473  */
474 
475 void	stray_irqhandler(u_int);	/* called from assembly */
476 
477 void
478 stray_irqhandler(mask)
479 	u_int mask;
480 {
481 	static u_int stray_irqs = 0;
482 
483 	if (++stray_irqs <= 8)
484 		log(LOG_ERR, "Stray interrupt %08x%s\n", mask,
485 		    stray_irqs >= 8 ? ": stopped logging" : "");
486 }
487