1 /* $NetBSD: imx_ccm_pll.c,v 1.1 2020/12/23 14:42:38 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2020 Jared McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: imx_ccm_pll.c,v 1.1 2020/12/23 14:42:38 skrll Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 35 #include <dev/clk/clk_backend.h> 36 37 #include <arm/nxp/imx_ccm.h> 38 39 #include <dev/fdt/fdtvar.h> 40 41 #define PLL_POWERDOWN __BIT(12) 42 #define PLL_POWERDOWN_ENET __BIT(5) 43 44 int 45 imx_ccm_pll_enable(struct imx_ccm_softc *sc, struct imx_ccm_clk *clk, 46 int enable) 47 { 48 struct imx_ccm_pll *pll = &clk->u.pll; 49 uint32_t val, mask; 50 51 KASSERT(clk->type == IMX_CCM_PLL); 52 53 if ((pll->flags & IMX_PLL_ENET) != 0) 54 mask = PLL_POWERDOWN_ENET; 55 else 56 mask = PLL_POWERDOWN; 57 58 val = CCM_READ(sc, clk->regidx, pll->reg); 59 if (enable) 60 val &= ~mask; 61 else 62 val |= mask; 63 CCM_WRITE(sc, clk->regidx, pll->reg, val); 64 65 return 0; 66 } 67 68 u_int 69 imx_ccm_pll_get_rate(struct imx_ccm_softc *sc, 70 struct imx_ccm_clk *clk) 71 { 72 struct imx_ccm_pll *pll= &clk->u.pll; 73 struct clk *clkp, *clkp_parent; 74 75 KASSERT(clk->type == IMX_CCM_PLL); 76 77 clkp = &clk->base; 78 clkp_parent = clk_get_parent(clkp); 79 if (clkp_parent == NULL) 80 return 0; 81 82 const u_int prate = clk_get_rate(clkp_parent); 83 if (prate == 0) 84 return 0; 85 86 if ((pll->flags & IMX_PLL_ENET) != 0) { 87 /* For ENET PLL, div_mask contains the fixed output rate */ 88 return pll->div_mask; 89 } 90 91 const uint32_t val = CCM_READ(sc, clk->regidx, pll->reg); 92 const u_int div = __SHIFTOUT(val, pll->div_mask); 93 94 if ((pll->flags & IMX_PLL_ARM) != 0) { 95 return prate * div / 2; 96 } 97 98 if ((pll->flags & IMX_PLL_480M_528M) != 0) { 99 return div == 1 ? 528000000 : 480000000; 100 } 101 102 return 0; 103 } 104 105 const char * 106 imx_ccm_pll_get_parent(struct imx_ccm_softc *sc, 107 struct imx_ccm_clk *clk) 108 { 109 struct imx_ccm_pll *pll = &clk->u.pll; 110 111 KASSERT(clk->type == IMX_CCM_PLL); 112 113 return pll->parent; 114 } 115