1*a33a6c43Sbouyer /* $NetBSD: imx6_usbphy.c,v 1.3 2023/05/04 13:29:33 bouyer Exp $ */
28644267aSskrll
38644267aSskrll /*-
48644267aSskrll * Copyright (c) 2019 Genetec Corporation. All rights reserved.
58644267aSskrll * Written by Hashimoto Kenichi for Genetec Corporation.
68644267aSskrll *
78644267aSskrll * Redistribution and use in source and binary forms, with or without
88644267aSskrll * modification, are permitted provided that the following conditions
98644267aSskrll * are met:
108644267aSskrll * 1. Redistributions of source code must retain the above copyright
118644267aSskrll * notice, this list of conditions and the following disclaimer.
128644267aSskrll * 2. Redistributions in binary form must reproduce the above copyright
138644267aSskrll * notice, this list of conditions and the following disclaimer in the
148644267aSskrll * documentation and/or other materials provided with the distribution.
158644267aSskrll *
168644267aSskrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
178644267aSskrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
188644267aSskrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
198644267aSskrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
208644267aSskrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
218644267aSskrll * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
228644267aSskrll * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
238644267aSskrll * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
248644267aSskrll * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
258644267aSskrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
268644267aSskrll * SUCH DAMAGE.
278644267aSskrll */
288644267aSskrll
298644267aSskrll #include <sys/cdefs.h>
30*a33a6c43Sbouyer __KERNEL_RCSID(1, "$NetBSD: imx6_usbphy.c,v 1.3 2023/05/04 13:29:33 bouyer Exp $");
318644267aSskrll
328644267aSskrll #include "opt_fdt.h"
338644267aSskrll
348644267aSskrll #include "locators.h"
358644267aSskrll #include "ohci.h"
368644267aSskrll #include "ehci.h"
378644267aSskrll
388644267aSskrll #include <sys/param.h>
398644267aSskrll #include <sys/bus.h>
408644267aSskrll #include <sys/device.h>
418644267aSskrll
428644267aSskrll #include <arm/nxp/imx6_usbphyreg.h>
438644267aSskrll
448644267aSskrll #include <dev/fdt/fdtvar.h>
458644267aSskrll
468644267aSskrll struct imx6_usbphy_softc {
478644267aSskrll device_t sc_dev;
488644267aSskrll
498644267aSskrll bus_space_tag_t sc_iot;
508644267aSskrll bus_space_handle_t sc_ioh;
518644267aSskrll
528644267aSskrll struct clk *sc_clk;
538644267aSskrll };
548644267aSskrll
558644267aSskrll static int imx6_usbphy_match(device_t, cfdata_t, void *);
568644267aSskrll static void imx6_usbphy_attach(device_t, device_t, void *);
578644267aSskrll
588644267aSskrll static int imx6_usbphy_init_clocks(device_t);
598644267aSskrll static int imx6_usbphy_enable(device_t, void *, bool);
608644267aSskrll
618644267aSskrll CFATTACH_DECL_NEW(imxusbphy, sizeof(struct imx6_usbphy_softc),
628644267aSskrll imx6_usbphy_match, imx6_usbphy_attach, NULL, NULL);
638644267aSskrll
646e54367aSthorpej static const struct device_compatible_entry compat_data[] = {
656e54367aSthorpej { .compat = "fsl,imx6q-usbphy" },
66*a33a6c43Sbouyer { .compat = "fsl,imx6sx-usbphy" },
676e54367aSthorpej DEVICE_COMPAT_EOL
688644267aSskrll };
698644267aSskrll
708644267aSskrll static int
imx6_usbphy_match(device_t parent,cfdata_t cf,void * aux)718644267aSskrll imx6_usbphy_match(device_t parent, cfdata_t cf, void *aux)
728644267aSskrll {
738644267aSskrll struct fdt_attach_args * const faa = aux;
748644267aSskrll
756e54367aSthorpej return of_compatible_match(faa->faa_phandle, compat_data);
768644267aSskrll }
778644267aSskrll
788644267aSskrll static void
imx6_usbphy_attach(device_t parent,device_t self,void * aux)798644267aSskrll imx6_usbphy_attach(device_t parent, device_t self, void *aux)
808644267aSskrll {
818644267aSskrll struct imx6_usbphy_softc *sc = device_private(self);
828644267aSskrll struct fdt_attach_args * const faa = aux;
838644267aSskrll const int phandle = faa->faa_phandle;
848644267aSskrll bus_space_tag_t bst = faa->faa_bst;
858644267aSskrll bus_space_handle_t bsh;
868644267aSskrll bus_addr_t addr;
878644267aSskrll bus_size_t size;
888644267aSskrll int error;
898644267aSskrll
908644267aSskrll if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
918644267aSskrll aprint_error(": couldn't get iomux registers\n");
928644267aSskrll return;
938644267aSskrll }
948644267aSskrll
958644267aSskrll error = bus_space_map(bst, addr, size, 0, &bsh);
968644267aSskrll if (error) {
978644267aSskrll aprint_error(": couldn't map %#" PRIxBUSADDR ": %d", addr, error);
988644267aSskrll return;
998644267aSskrll }
1008644267aSskrll
1018644267aSskrll sc->sc_clk = fdtbus_clock_get_index(phandle, 0);
1028644267aSskrll if (sc->sc_clk == NULL) {
1038644267aSskrll aprint_error(": couldn't get clock\n");
1048644267aSskrll return;
1058644267aSskrll }
1068644267aSskrll
1078644267aSskrll sc->sc_dev = self;
1088644267aSskrll sc->sc_iot = bst;
1098644267aSskrll sc->sc_ioh = bsh;
1108644267aSskrll
1118644267aSskrll aprint_naive("\n");
1128644267aSskrll aprint_normal(": USB PHY\n");
1138644267aSskrll
1148644267aSskrll imx6_usbphy_init_clocks(self);
1158644267aSskrll imx6_usbphy_enable(self, NULL, true);
1168644267aSskrll }
1178644267aSskrll
1188644267aSskrll static int
imx6_usbphy_init_clocks(device_t dev)1198644267aSskrll imx6_usbphy_init_clocks(device_t dev)
1208644267aSskrll {
1218644267aSskrll struct imx6_usbphy_softc * const sc = device_private(dev);
1228644267aSskrll int error;
1238644267aSskrll
1248644267aSskrll error = clk_enable(sc->sc_clk);
1258644267aSskrll if (error) {
1268644267aSskrll aprint_error_dev(sc->sc_dev, "couldn't enable: %d\n", error);
1278644267aSskrll return error;
1288644267aSskrll }
1298644267aSskrll
1308644267aSskrll return 0;
1318644267aSskrll }
1328644267aSskrll
1338644267aSskrll #define USBPHY_READ(sc, reg) \
1348644267aSskrll bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg))
1358644267aSskrll #define USBPHY_WRITE(sc, reg, val) \
1368644267aSskrll bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
1378644267aSskrll
1388644267aSskrll static int
imx6_usbphy_enable(device_t dev,void * priv,bool enable)1398644267aSskrll imx6_usbphy_enable(device_t dev, void *priv, bool enable)
1408644267aSskrll {
1418644267aSskrll struct imx6_usbphy_softc * const sc = device_private(dev);
1428644267aSskrll
1438644267aSskrll /* USBPHY enable */
1448644267aSskrll USBPHY_WRITE(sc, USBPHY_CTRL, USBPHY_CTRL_CLKGATE);
1458644267aSskrll
1468644267aSskrll /* do reset */
1478644267aSskrll USBPHY_WRITE(sc, USBPHY_CTRL_SET, USBPHY_CTRL_SFTRST);
1488644267aSskrll delay(100);
1498644267aSskrll
1508644267aSskrll /* clear reset, and run clocks */
1518644267aSskrll USBPHY_WRITE(sc, USBPHY_CTRL_CLR,
1528644267aSskrll USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE);
1538644267aSskrll delay(100);
1548644267aSskrll
1558644267aSskrll /* power on */
1568644267aSskrll USBPHY_WRITE(sc, USBPHY_PWD, 0);
1578644267aSskrll
1588644267aSskrll /* UTMI+Level2, Level3 */
1598644267aSskrll USBPHY_WRITE(sc, USBPHY_CTRL_SET,
1608644267aSskrll USBPHY_CTRL_ENUTMILEVEL2 | USBPHY_CTRL_ENUTMILEVEL3);
1618644267aSskrll
1628644267aSskrll return 0;
1638644267aSskrll }
1648644267aSskrll
165