1 /* $NetBSD: imx6_iomux.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2019 Genetec Corporation. All rights reserved. 5 * Written by Hashimoto Kenichi for Genetec Corporation. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: imx6_iomux.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $"); 31 32 #include "opt_fdt.h" 33 34 #include <sys/param.h> 35 #include <sys/bus.h> 36 #include <sys/device.h> 37 38 #include <arm/nxp/imx6_iomuxreg.h> 39 40 #include <dev/fdt/fdtvar.h> 41 42 struct imxiomux_softc { 43 device_t sc_dev; 44 45 bus_space_tag_t sc_iot; 46 bus_space_handle_t sc_ioh; 47 48 int sc_phandle; 49 }; 50 51 #define CONFIG_NO_PAD_CTL __BIT(31) 52 #define CONFIG_SION __BIT(30) 53 54 static int 55 imx6_pinctrl_set_config(device_t dev, const void *data, size_t len) 56 { 57 struct imxiomux_softc * const sc = device_private(dev); 58 int pins_len; 59 uint32_t reg; 60 61 if (len != 4) 62 return -1; 63 64 const int phandle = fdtbus_get_phandle_from_native(be32dec(data)); 65 const u_int *pins = fdtbus_get_prop(phandle, "fsl,pins", &pins_len); 66 67 aprint_debug_dev(sc->sc_dev, "name %s\n", fdtbus_get_string(phandle, "name")); 68 while (pins_len >= 24) { 69 u_int mux_reg = be32toh(pins[0]); 70 u_int conf_reg = be32toh(pins[1]); 71 u_int input_reg = be32toh(pins[2]); 72 u_int mux_mode = be32toh(pins[3]); 73 u_int input_val = be32toh(pins[4]); 74 u_int config = be32toh(pins[5]); 75 76 if (config & CONFIG_SION) 77 mux_mode |= IOMUX_CONFIG_SION; 78 config &= ~CONFIG_SION; 79 80 reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, mux_reg); 81 bus_space_write_4(sc->sc_iot, sc->sc_ioh, mux_reg, mux_mode); 82 aprint_debug_dev(sc->sc_dev, 83 "mux offset 0x%08x, val 0x%08x -> 0x%08x\n", 84 mux_reg, reg, mux_mode); 85 86 if (!(config & CONFIG_NO_PAD_CTL)) { 87 reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, conf_reg); 88 bus_space_write_4(sc->sc_iot, sc->sc_ioh, conf_reg, config); 89 aprint_debug_dev(sc->sc_dev, 90 "config offset 0x%08x, val 0x%08x -> 0x%08x\n", 91 conf_reg, reg, config); 92 } 93 94 if (__SHIFTOUT(input_val, __BITS(31, 24)) == 0xff) { 95 uint8_t sel = __SHIFTOUT(input_val, __BITS(7, 0)); 96 uint8_t width = __SHIFTOUT(input_val, __BITS(15, 8)); 97 uint8_t shift = __SHIFTOUT(input_val, __BITS(23, 16)); 98 uint32_t mask = __BITS(shift + (width - 1), shift); 99 100 reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, input_reg); 101 reg &= ~mask; 102 reg |= __SHIFTIN(sel, mask); 103 bus_space_write_4(sc->sc_iot, sc->sc_ioh, input_reg, reg); 104 aprint_debug_dev(sc->sc_dev, 105 "+input offset 0x%08x, val 0x%08x\n", 106 input_reg, reg); 107 } else if (input_reg != 0) { 108 reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, input_reg); 109 bus_space_write_4(sc->sc_iot, sc->sc_ioh, input_reg, input_val); 110 aprint_debug_dev(sc->sc_dev, 111 "input offset 0x%08x, val 0x%08x -> 0x%08x\n", 112 input_reg, reg, input_val); 113 } 114 115 pins_len -= 24; 116 pins += 6; 117 } 118 119 return 0; 120 } 121 122 static struct fdtbus_pinctrl_controller_func imx6_pinctrl_funcs = { 123 .set_config = imx6_pinctrl_set_config, 124 }; 125 126 static int imxiomux_match(device_t, struct cfdata *, void *); 127 static void imxiomux_attach(device_t, device_t, void *); 128 129 CFATTACH_DECL_NEW(imxiomux, sizeof(struct imxiomux_softc), 130 imxiomux_match, imxiomux_attach, NULL, NULL); 131 132 static const struct device_compatible_entry compat_data[] = { 133 { .compat = "fsl,imx6q-iomuxc" }, 134 { .compat = "fsl,imx7d-iomuxc" }, 135 { .compat = "fsl,imx8mq-iomuxc" }, 136 DEVICE_COMPAT_EOL 137 }; 138 139 static int 140 imxiomux_match(device_t parent, cfdata_t cf, void *aux) 141 { 142 struct fdt_attach_args * const faa = aux; 143 144 return of_compatible_match(faa->faa_phandle, compat_data); 145 } 146 147 static void 148 imxiomux_attach(device_t parent, device_t self, void *aux) 149 { 150 struct imxiomux_softc * const sc = device_private(self); 151 struct fdt_attach_args * const faa = aux; 152 const int phandle = faa->faa_phandle; 153 bus_addr_t addr; 154 bus_size_t size; 155 int error; 156 157 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 158 aprint_error(": couldn't get iomux registers\n"); 159 return; 160 } 161 162 sc->sc_dev = self; 163 sc->sc_iot = faa->faa_bst; 164 165 error = bus_space_map(sc->sc_iot, addr, size, 0, &sc->sc_ioh); 166 if (error) { 167 aprint_error(": couldn't map iomux registers: %d\n", error); 168 return; 169 } 170 171 aprint_naive("\n"); 172 aprint_normal(": IOMUX Controller\n"); 173 174 for (int child = OF_child(phandle); child; child = OF_peer(child)) { 175 if (of_hasprop(child, "fsl,pins")) { 176 fdtbus_register_pinctrl_config(self, child, &imx6_pinctrl_funcs); 177 } else { 178 for (int sub = OF_child(child); sub; sub = OF_peer(sub)) { 179 if (!of_hasprop(sub, "fsl,pins")) 180 continue; 181 fdtbus_register_pinctrl_config(self, sub, &imx6_pinctrl_funcs); 182 } 183 } 184 } 185 } 186 187