1 /* $NetBSD: tegra_platform.c,v 1.8 2017/10/22 20:35:32 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared D. McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include "opt_tegra.h" 30 #include "opt_multiprocessor.h" 31 #include "opt_fdt_arm.h" 32 33 #include "ukbd.h" 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: tegra_platform.c,v 1.8 2017/10/22 20:35:32 skrll Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/bus.h> 40 #include <sys/cpu.h> 41 #include <sys/device.h> 42 #include <sys/termios.h> 43 44 #include <dev/fdt/fdtvar.h> 45 46 #include <uvm/uvm_extern.h> 47 48 #include <machine/bootconfig.h> 49 #include <arm/cpufunc.h> 50 51 #include <arm/nvidia/tegra_reg.h> 52 #include <arm/nvidia/tegra_var.h> 53 54 #include <arm/fdt/arm_fdtvar.h> 55 56 #if NUKBD > 0 57 #include <dev/usb/ukbdvar.h> 58 #endif 59 60 #include <dev/ic/ns16550reg.h> 61 #include <dev/ic/comreg.h> 62 63 #define PLLP_OUT0_FREQ 408000000 64 65 static const struct pmap_devmap * 66 tegra_platform_devmap(void) 67 { 68 static const struct pmap_devmap devmap[] = { 69 DEVMAP_ENTRY(TEGRA_HOST1X_VBASE, 70 TEGRA_HOST1X_BASE, 71 TEGRA_HOST1X_SIZE), 72 DEVMAP_ENTRY(TEGRA_PPSB_VBASE, 73 TEGRA_PPSB_BASE, 74 TEGRA_PPSB_SIZE), 75 DEVMAP_ENTRY(TEGRA_APB_VBASE, 76 TEGRA_APB_BASE, 77 TEGRA_APB_SIZE), 78 DEVMAP_ENTRY(TEGRA_AHB_A2_VBASE, 79 TEGRA_AHB_A2_BASE, 80 TEGRA_AHB_A2_SIZE), 81 DEVMAP_ENTRY_END 82 }; 83 84 return devmap; 85 } 86 87 static void 88 tegra124_platform_bootstrap(void) 89 { 90 tegra_bootstrap(); 91 92 tegra124_mpinit(); 93 } 94 95 static void 96 tegra210_platform_bootstrap(void) 97 { 98 tegra_bootstrap(); 99 100 tegra210_mpinit(); 101 } 102 103 static void 104 tegra_platform_init_attach_args(struct fdt_attach_args *faa) 105 { 106 extern struct bus_space armv7_generic_bs_tag; 107 extern struct bus_space armv7_generic_a4x_bs_tag; 108 extern struct arm32_bus_dma_tag armv7_generic_dma_tag; 109 110 faa->faa_bst = &armv7_generic_bs_tag; 111 faa->faa_a4x_bst = &armv7_generic_a4x_bs_tag; 112 faa->faa_dmat = &armv7_generic_dma_tag; 113 } 114 115 static void 116 tegra_platform_early_putchar(char c) 117 { 118 #ifdef CONSADDR 119 #define CONSADDR_VA (CONSADDR - TEGRA_APB_BASE + TEGRA_APB_VBASE) 120 volatile uint32_t *uartaddr = (volatile uint32_t *)CONSADDR_VA; 121 122 while ((uartaddr[com_lsr] & LSR_TXRDY) == 0) 123 ; 124 125 uartaddr[com_data] = c; 126 #endif 127 } 128 129 static void 130 tegra_platform_device_register(device_t self, void *aux) 131 { 132 prop_dictionary_t dict = device_properties(self); 133 134 if (device_is_a(self, "tegrafb") && 135 match_bootconf_option(boot_args, "console", "fb")) { 136 prop_dictionary_set_bool(dict, "is_console", true); 137 #if NUKBD > 0 138 ukbd_cnattach(); 139 #endif 140 } 141 142 if (device_is_a(self, "tegradrm")) { 143 const char *video = get_bootconf_string(boot_args, "video"); 144 if (video) 145 prop_dictionary_set_cstring(dict, "HDMI-A-1", video); 146 if (match_bootconf_option(boot_args, "hdmi.forcemode", "dvi")) 147 prop_dictionary_set_bool(dict, "force-dvi", true); 148 } 149 150 if (device_is_a(self, "tegracec")) 151 prop_dictionary_set_cstring(dict, "hdmi-device", "tegradrm0"); 152 153 if (device_is_a(self, "nouveau")) { 154 const char *config = get_bootconf_string(boot_args, 155 "nouveau.config"); 156 if (config) 157 prop_dictionary_set_cstring(dict, "config", config); 158 const char *debug = get_bootconf_string(boot_args, 159 "nouveau.debug"); 160 if (debug) 161 prop_dictionary_set_cstring(dict, "debug", debug); 162 } 163 164 if (device_is_a(self, "tegrapcie")) { 165 const char * const jetsontk1_compat[] = { 166 "nvidia,jetson-tk1", NULL 167 }; 168 const int phandle = OF_peer(0); 169 if (of_match_compatible(phandle, jetsontk1_compat)) { 170 /* rfkill GPIO at GPIO X7 */ 171 struct tegra_gpio_pin *pin = 172 tegra_gpio_acquire("X7", GPIO_PIN_OUTPUT); 173 if (pin) 174 tegra_gpio_write(pin, 1); 175 } 176 } 177 } 178 179 static void 180 tegra_platform_reset(void) 181 { 182 tegra_pmc_reset(); 183 } 184 185 static void 186 tegra_platform_delay(u_int us) 187 { 188 tegra_timer_delay(us); 189 } 190 191 static u_int 192 tegra_platform_uart_freq(void) 193 { 194 return PLLP_OUT0_FREQ; 195 } 196 197 static const struct arm_platform tegra124_platform = { 198 .devmap = tegra_platform_devmap, 199 .bootstrap = tegra124_platform_bootstrap, 200 .init_attach_args = tegra_platform_init_attach_args, 201 .early_putchar = tegra_platform_early_putchar, 202 .device_register = tegra_platform_device_register, 203 .reset = tegra_platform_reset, 204 .delay = tegra_platform_delay, 205 .uart_freq = tegra_platform_uart_freq, 206 }; 207 208 ARM_PLATFORM(tegra124, "nvidia,tegra124", &tegra124_platform); 209 210 static const struct arm_platform tegra210_platform = { 211 .devmap = tegra_platform_devmap, 212 .bootstrap = tegra210_platform_bootstrap, 213 .init_attach_args = tegra_platform_init_attach_args, 214 .early_putchar = tegra_platform_early_putchar, 215 .device_register = tegra_platform_device_register, 216 .reset = tegra_platform_reset, 217 .delay = tegra_platform_delay, 218 .uart_freq = tegra_platform_uart_freq, 219 }; 220 221 ARM_PLATFORM(tegra210, "nvidia,tegra210", &tegra210_platform); 222