xref: /netbsd-src/sys/arch/arm/nvidia/tegra_lic.c (revision d909946ca08dceb44d7d0f22ec9488679695d976)
1 /* $NetBSD: tegra_lic.c,v 1.3 2016/01/05 21:53:48 marty Exp $ */
2 
3 /*-
4  * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: tegra_lic.c,v 1.3 2016/01/05 21:53:48 marty Exp $");
31 
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/device.h>
35 #include <sys/intr.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/kmem.h>
39 
40 #include <arm/nvidia/tegra_reg.h>
41 #include <arm/nvidia/tegra_var.h>
42 
43 #include <arm/cortex/gic_intr.h>
44 
45 #include <dev/fdt/fdtvar.h>
46 
47 static int	tegra_lic_match(device_t, cfdata_t, void *);
48 static void	tegra_lic_attach(device_t, device_t, void *);
49 
50 static void *	tegra_lic_establish(device_t, u_int *, int, int,
51 		    int (*)(void *), void *);
52 static void	tegra_lic_disestablish(device_t, void *);
53 static bool	tegra_lic_intrstr(device_t, u_int *, char *, size_t);
54 
55 struct fdtbus_interrupt_controller_func tegra_lic_funcs = {
56 	.establish = tegra_lic_establish,
57 	.disestablish = tegra_lic_disestablish,
58 	.intrstr = tegra_lic_intrstr
59 };
60 
61 struct tegra_lic_softc {
62 	device_t		sc_dev;
63 	int			sc_phandle;
64 };
65 
66 CFATTACH_DECL_NEW(tegra_lic, sizeof(struct tegra_lic_softc),
67 	tegra_lic_match, tegra_lic_attach, NULL, NULL);
68 
69 static int
70 tegra_lic_match(device_t parent, cfdata_t cf, void *aux)
71 {
72 	const char * const compatible[] = { "nvidia,tegra124-ictlr", NULL };
73 	struct fdt_attach_args * const faa = aux;
74 
75 	return of_match_compatible(faa->faa_phandle, compatible);
76 }
77 
78 static void
79 tegra_lic_attach(device_t parent, device_t self, void *aux)
80 {
81 	struct tegra_lic_softc * const sc = device_private(self);
82 	struct fdt_attach_args * const faa = aux;
83 	int error;
84 
85 	sc->sc_dev = self;
86 	sc->sc_phandle = faa->faa_phandle;
87 
88 	error = fdtbus_register_interrupt_controller(self, faa->faa_phandle,
89 	    &tegra_lic_funcs);
90 	if (error) {
91 		aprint_error(": couldn't register with fdtbus: %d\n", error);
92 		return;
93 	}
94 
95 	aprint_naive("\n");
96 	aprint_normal(": LIC\n");
97 }
98 
99 static void *
100 tegra_lic_establish(device_t dev, u_int *specifier, int ipl, int flags,
101     int (*func)(void *), void *arg)
102 {
103 	int iflags = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;
104 
105 	/* 1st cell is the interrupt type; 0 is SPI, 1 is PPI */
106 	/* 2nd cell is the interrupt number */
107 	/* 3rd cell is flags */
108 
109 	const u_int type = be32toh(specifier[0]);
110 	const u_int intr = be32toh(specifier[1]);
111 	const u_int irq = type == 0 ? IRQ_SPI(intr) : IRQ_PPI(intr);
112 	const u_int trig = be32toh(specifier[2]) & 0xf;
113 	const u_int level = (trig & 0x3) ? IST_EDGE : IST_LEVEL;
114 
115 	return intr_establish(irq, ipl, level | iflags, func, arg);
116 }
117 
118 static void
119 tegra_lic_disestablish(device_t dev, void *ih)
120 {
121 	intr_disestablish(ih);
122 }
123 
124 static bool
125 tegra_lic_intrstr(device_t dev, u_int *specifier, char *buf,
126     size_t buflen)
127 {
128 	/* 1st cell is the interrupt type; 0 is SPI, 1 is PPI */
129 	/* 2nd cell is the interrupt number */
130 	/* 3rd cell is flags */
131 
132 	const u_int type = be32toh(specifier[0]);
133 	const u_int intr = be32toh(specifier[1]);
134 	const u_int irq = type == 0 ? IRQ_SPI(intr) : IRQ_PPI(intr);
135 
136 	snprintf(buf, buflen, "LIC irq %d", irq);
137 
138 	return true;
139 }
140