1 /* $NetBSD: tegra_ehci.c,v 1.9 2015/10/21 20:02:12 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include "locators.h" 30 31 #include <sys/cdefs.h> 32 __KERNEL_RCSID(0, "$NetBSD: tegra_ehci.c,v 1.9 2015/10/21 20:02:12 jmcneill Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/bus.h> 36 #include <sys/device.h> 37 #include <sys/intr.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 41 #include <dev/usb/usb.h> 42 #include <dev/usb/usbdi.h> 43 #include <dev/usb/usbdivar.h> 44 #include <dev/usb/usb_mem.h> 45 #include <dev/usb/ehcireg.h> 46 #include <dev/usb/ehcivar.h> 47 48 #include <arm/nvidia/tegra_var.h> 49 #include <arm/nvidia/tegra_usbreg.h> 50 51 #define TEGRA_EHCI_REG_OFFSET 0x100 52 53 static int tegra_ehci_match(device_t, cfdata_t, void *); 54 static void tegra_ehci_attach(device_t, device_t, void *); 55 56 static void tegra_ehci_init(struct ehci_softc *); 57 58 struct tegra_ehci_softc { 59 struct ehci_softc sc; 60 bus_space_tag_t sc_bst; 61 bus_space_handle_t sc_bsh; 62 void *sc_ih; 63 u_int sc_port; 64 }; 65 66 static int tegra_ehci_port_status(struct ehci_softc *sc, uint32_t v, 67 int i); 68 69 CFATTACH_DECL2_NEW(tegra_ehci, sizeof(struct tegra_ehci_softc), 70 tegra_ehci_match, tegra_ehci_attach, NULL, 71 ehci_activate, NULL, ehci_childdet); 72 73 static int 74 tegra_ehci_match(device_t parent, cfdata_t cf, void *aux) 75 { 76 return 1; 77 } 78 79 static void 80 tegra_ehci_attach(device_t parent, device_t self, void *aux) 81 { 82 struct tegra_ehci_softc * const sc = device_private(self); 83 struct tegraio_attach_args * const tio = aux; 84 const struct tegra_locators * const loc = &tio->tio_loc; 85 int error; 86 87 sc->sc_bst = tio->tio_bst; 88 bus_space_subregion(tio->tio_bst, tio->tio_bsh, 89 loc->loc_offset, loc->loc_size, &sc->sc_bsh); 90 sc->sc_port = loc->loc_port; 91 92 sc->sc.sc_dev = self; 93 sc->sc.sc_bus.hci_private = &sc->sc; 94 sc->sc.sc_bus.dmatag = tio->tio_dmat; 95 sc->sc.sc_bus.usbrev = USBREV_2_0; 96 sc->sc.sc_ncomp = 0; 97 sc->sc.sc_flags = EHCIF_ETTF; 98 sc->sc.sc_id_vendor = 0x10de; 99 strlcpy(sc->sc.sc_vendor, "Tegra", sizeof(sc->sc.sc_vendor)); 100 sc->sc.sc_size = loc->loc_size; 101 sc->sc.iot = tio->tio_bst; 102 bus_space_subregion(tio->tio_bst, tio->tio_bsh, 103 loc->loc_offset + TEGRA_EHCI_REG_OFFSET, 104 loc->loc_size - TEGRA_EHCI_REG_OFFSET, &sc->sc.ioh); 105 sc->sc.sc_vendor_init = tegra_ehci_init; 106 sc->sc.sc_vendor_port_status = tegra_ehci_port_status; 107 108 aprint_naive("\n"); 109 aprint_normal(": USB%d\n", loc->loc_port + 1); 110 111 sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH); 112 113 sc->sc_ih = intr_establish(loc->loc_intr, IPL_USB, IST_LEVEL, 114 ehci_intr, &sc->sc); 115 if (sc->sc_ih == NULL) { 116 aprint_error_dev(self, "couldn't establish interrupt %d\n", 117 loc->loc_intr); 118 return; 119 } 120 aprint_normal_dev(self, "interrupting on irq %d\n", loc->loc_intr); 121 122 error = ehci_init(&sc->sc); 123 if (error != USBD_NORMAL_COMPLETION) { 124 aprint_error_dev(self, "init failed, error = %d\n", error); 125 return; 126 } 127 128 sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint); 129 } 130 131 static void 132 tegra_ehci_init(struct ehci_softc *esc) 133 { 134 struct tegra_ehci_softc * const sc = device_private(esc->sc_dev); 135 uint32_t usbmode; 136 137 usbmode = bus_space_read_4(sc->sc_bst, sc->sc_bsh, 138 TEGRA_EHCI_USBMODE_REG); 139 140 const u_int cm = __SHIFTOUT(usbmode, TEGRA_EHCI_USBMODE_CM); 141 if (cm != TEGRA_EHCI_USBMODE_CM_HOST) { 142 aprint_verbose_dev(esc->sc_dev, "switching to host mode\n"); 143 usbmode &= ~TEGRA_EHCI_USBMODE_CM; 144 usbmode |= __SHIFTIN(TEGRA_EHCI_USBMODE_CM_HOST, 145 TEGRA_EHCI_USBMODE_CM); 146 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 147 TEGRA_EHCI_USBMODE_REG, usbmode); 148 } 149 150 /* Parallel transceiver select */ 151 tegra_reg_set_clear(sc->sc_bst, sc->sc_bsh, 152 TEGRA_EHCI_HOSTPC1_DEVLC_REG, 153 __SHIFTIN(TEGRA_EHCI_HOSTPC1_DEVLC_PTS_UTMI, 154 TEGRA_EHCI_HOSTPC1_DEVLC_PTS), 155 TEGRA_EHCI_HOSTPC1_DEVLC_PTS | 156 TEGRA_EHCI_HOSTPC1_DEVLC_STS); 157 158 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TEGRA_EHCI_TXFILLTUNING_REG, 159 __SHIFTIN(0x10, TEGRA_EHCI_TXFILLTUNING_TXFIFOTHRES)); 160 } 161 162 static int 163 tegra_ehci_port_status(struct ehci_softc *ehci_sc, uint32_t v, int i) 164 { 165 struct tegra_ehci_softc * const sc = device_private(ehci_sc->sc_dev); 166 bus_space_tag_t iot = sc->sc_bst; 167 bus_space_handle_t ioh = sc->sc_bsh; 168 169 i &= ~(UPS_HIGH_SPEED|UPS_LOW_SPEED); 170 171 uint32_t val = bus_space_read_4(iot, ioh, 172 TEGRA_EHCI_HOSTPC1_DEVLC_REG); 173 174 switch (__SHIFTOUT(val, TEGRA_EHCI_HOSTPC1_DEVLC_PSPD)) { 175 case TEGRA_EHCI_HOSTPC1_DEVLC_PSPD_FS: 176 i |= UPS_FULL_SPEED; 177 break; 178 case TEGRA_EHCI_HOSTPC1_DEVLC_PSPD_LS: 179 i |= UPS_LOW_SPEED; 180 break; 181 case TEGRA_EHCI_HOSTPC1_DEVLC_PSPD_HS: 182 default: 183 i |= UPS_HIGH_SPEED; 184 break; 185 } 186 return i; 187 } 188