xref: /netbsd-src/sys/arch/arm/marvell/mvsoc_intr.c (revision 7788a0781fe6ff2cce37368b4578a7ade0850cb1)
1 /*	$NetBSD: mvsoc_intr.c,v 1.6 2013/05/29 20:47:14 rkujawa Exp $	*/
2 /*
3  * Copyright (c) 2010 KIYOHARA Takashi
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25  * POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 __KERNEL_RCSID(0, "$NetBSD: mvsoc_intr.c,v 1.6 2013/05/29 20:47:14 rkujawa Exp $");
30 
31 #define _INTR_PRIVATE
32 
33 #include <sys/param.h>
34 #include <sys/proc.h>
35 
36 #include <machine/intr.h>
37 
38 #include <arm/cpu.h>
39 #include <arm/pic/picvar.h>
40 #include <arm/marvell/mvsocreg.h>
41 #include <arm/marvell/mvsocvar.h>
42 
43 #include "opt_mvsoc.h"
44 
45 #if defined(ARMADAXP)
46 extern void armadaxp_handle_irq(void *);
47 #endif
48 
49 int (*find_pending_irqs)(void);
50 
51 static void mvsoc_bridge_pic_unblock_irqs(struct pic_softc *, size_t, uint32_t);
52 static void mvsoc_bridge_pic_block_irqs(struct pic_softc *, size_t, uint32_t);
53 static int mvsoc_bridge_pic_find_pending_irqs(struct pic_softc *);
54 static void mvsoc_bridge_pic_establish_irq(struct pic_softc *,
55 					   struct intrsource *);
56 static void mvsoc_bridge_pic_source_name(struct pic_softc *, int, char *,
57 					 size_t);
58 
59 static const char * const sources[] = {
60     "CPUSelfInt",      "CPUTimer0IntReq", "CPUTimer1IntReq", "CPUWDTimerIntReq",
61     "AccessErr",       "Bit64Err",
62 };
63 
64 static struct pic_ops mvsoc_bridge_picops = {
65 	.pic_unblock_irqs = mvsoc_bridge_pic_unblock_irqs,
66 	.pic_block_irqs = mvsoc_bridge_pic_block_irqs,
67 	.pic_find_pending_irqs = mvsoc_bridge_pic_find_pending_irqs,
68 	.pic_establish_irq = mvsoc_bridge_pic_establish_irq,
69 	.pic_source_name = mvsoc_bridge_pic_source_name,
70 };
71 
72 struct pic_softc mvsoc_bridge_pic = {
73 	.pic_ops = &mvsoc_bridge_picops,
74 	.pic_maxsources = MVSOC_MLMB_MLMBI_NIRQ,
75 	.pic_name = "mvsoc_bridge",
76 };
77 
78 
79 void
80 mvsoc_irq_handler(void *frame)
81 {
82 	struct cpu_info * const ci = curcpu();
83 #if defined(ARMADAXP)
84 	ci->ci_data.cpu_nintr++;
85 	armadaxp_handle_irq(frame);
86 #else
87 	const int oldipl = ci->ci_cpl;
88 	const uint32_t oldipl_mask = __BIT(oldipl);
89 	int ipl_mask = 0;
90 
91 	ci->ci_data.cpu_nintr++;
92 
93 	ipl_mask = find_pending_irqs();
94 
95 	/*
96 	 * Record the pending_ipls and deliver them if we can.
97 	 */
98 	if ((ipl_mask & ~oldipl_mask) > oldipl_mask)
99 		pic_do_pending_ints(I32_bit, oldipl, frame);
100 #endif
101 }
102 
103 /*
104  * Mbus-L to Mbus bridge
105  */
106 
107 void *
108 mvsoc_bridge_intr_establish(int ih, int ipl, int (*ih_func)(void *), void *arg)
109 {
110 
111 	return intr_establish(mvsoc_bridge_pic.pic_irqbase + ih, ipl,
112 	    IST_LEVEL_HIGH, ih_func, arg);
113 }
114 
115 /* ARGSUSED */
116 static void
117 mvsoc_bridge_pic_unblock_irqs(struct pic_softc *pic, size_t irqbase,
118 			      uint32_t irq_mask)
119 {
120 
121 	write_mlmbreg(MVSOC_MLMB_MLMBICR,
122 	    read_mlmbreg(MVSOC_MLMB_MLMBICR) & ~irq_mask);
123 	write_mlmbreg(MVSOC_MLMB_MLMBIMR,
124 	    read_mlmbreg(MVSOC_MLMB_MLMBIMR) | irq_mask);
125 }
126 
127 /* ARGSUSED */
128 static void
129 mvsoc_bridge_pic_block_irqs(struct pic_softc *pic, size_t irqbase,
130 			    uint32_t irq_mask)
131 {
132 
133 	write_mlmbreg(MVSOC_MLMB_MLMBIMR,
134 	    read_mlmbreg(MVSOC_MLMB_MLMBIMR) & ~irq_mask);
135 }
136 
137 static int
138 mvsoc_bridge_pic_find_pending_irqs(struct pic_softc *pic)
139 {
140 	uint32_t pending;
141 
142 	pending =
143 	    read_mlmbreg(MVSOC_MLMB_MLMBICR) & read_mlmbreg(MVSOC_MLMB_MLMBIMR);
144 
145 	if (pending == 0)
146 		return 0;
147 
148 	return pic_mark_pending_sources(pic, 0, pending);
149 }
150 
151 /* ARGSUSED */
152 static void
153 mvsoc_bridge_pic_establish_irq(struct pic_softc *pic, struct intrsource *is)
154 {
155 	/* Nothing */
156 }
157 
158 static void
159 mvsoc_bridge_pic_source_name(struct pic_softc *pic, int irq, char *buf,
160 			     size_t len)
161 {
162 
163 	strlcpy(buf, sources[irq], len);
164 }
165