1 /* $NetBSD: kirkwood.c,v 1.4 2011/05/24 17:45:49 matt Exp $ */ 2 /* 3 * Copyright (c) 2010 KIYOHARA Takashi 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __KERNEL_RCSID(0, "$NetBSD: kirkwood.c,v 1.4 2011/05/24 17:45:49 matt Exp $"); 30 31 #define _INTR_PRIVATE 32 33 #include "mvsocgpp.h" 34 35 #include <sys/param.h> 36 #include <sys/bus.h> 37 38 #include <machine/intr.h> 39 40 #include <arm/pic/picvar.h> 41 #include <arm/pic/picvar.h> 42 43 #include <arm/marvell/mvsocreg.h> 44 #include <arm/marvell/mvsocvar.h> 45 #include <arm/marvell/kirkwoodreg.h> 46 47 #include <dev/marvell/marvellreg.h> 48 49 50 static void kirkwood_intr_init(void); 51 52 static void kirkwood_pic_unblock_irqs(struct pic_softc *, size_t, uint32_t); 53 static void kirkwood_pic_block_irqs(struct pic_softc *, size_t, uint32_t); 54 static void kirkwood_pic_establish_irq(struct pic_softc *, struct intrsource *); 55 static void kirkwood_pic_source_name(struct pic_softc *, int, char *, size_t); 56 57 static int kirkwood_find_pending_irqs(void); 58 59 static const char * const sources[64] = { 60 "MainHighSum(0)", "Bridge(1)", "Host2CPU DB(2)", "CPU2Host DB(3)", 61 "Reserved_4(4)", "Xor0Chan0(5)", "Xor0Chan1(6)", "Xor1Chan0(7)", 62 "Xor1Chan1(8)", "PEX0INT(9)", "Reserved(10)", "GbE0Sum(11)", 63 "GbE0Rx(12)", "GbE0Tx(13)", "GbE0Misc(14)", "GbE1Sum(15)", 64 "GbE1Rx(16)", "GbE1Tx(17)", "GbE1Misc(18)", "USB0Cnt(19)", 65 "Reserved(20)", "Sata(21)", "SecurityInt(22)", "SPIInt(23)", 66 "AudioINT(24)", "Reserved(25)", "TS0Int(26)", "Reserved(27)", 67 "SDIOInt(28)", "TWSI(29)", "AVBInt(30)", "TDMInt(31)" 68 69 "Reserved(32)", "Uart0Int(33)", "Uart1Int(34)", "GPIOLo7_0(35)" 70 "GPIOLo8_15(36)", "GPIOLo16_23(37)", "GPIOLo24_31(38)", "GPIOHi7_0(39)" 71 "GPIOHi8_15(40)", "GPIOHi16_23(41)", "XOR0Err(42)", "XOR1Err(43)" 72 "PEX0Err(44)", "Reserved(45)", "GbE0Err(46)", "GbE1Err(47)" 73 "USBErr(48)", "SecurityErr(49)", "AudioErr(50)", "Reserved(51)" 74 "Reserved(52)", "RTCInt(53)", "Reserved(54)", "Reserved(55)" 75 "Reserved(56)", "Reserved(57)", "Reserved(58)", "Reserved(59)" 76 "Reserved(60)", "Reserved(61)", "Reserved(62)", "Reserved(63)" 77 }; 78 79 static struct pic_ops kirkwood_picops = { 80 .pic_unblock_irqs = kirkwood_pic_unblock_irqs, 81 .pic_block_irqs = kirkwood_pic_block_irqs, 82 .pic_establish_irq = kirkwood_pic_establish_irq, 83 .pic_source_name = kirkwood_pic_source_name, 84 }; 85 static struct pic_softc kirkwood_pic = { 86 .pic_ops = &kirkwood_picops, 87 .pic_maxsources = 64, 88 .pic_name = "kirkwood", 89 }; 90 91 92 /* 93 * kirkwood_intr_bootstrap: 94 * 95 * Initialize the rest of the interrupt subsystem, making it 96 * ready to handle interrupts from devices. 97 */ 98 void 99 kirkwood_intr_bootstrap(void) 100 { 101 extern void (*mvsoc_intr_init)(void); 102 103 /* disable all interrupts */ 104 write_mlmbreg(KIRKWOOD_MLMB_MIRQIMLR, 0); 105 write_mlmbreg(KIRKWOOD_MLMB_MIRQIMHR, 0); 106 107 /* disable all bridge interrupts */ 108 write_mlmbreg(MVSOC_MLMB_MLMBIMR, 0); 109 110 mvsoc_intr_init = kirkwood_intr_init; 111 112 #if NMVSOCGPP > 0 113 switch (mvsoc_model()) { 114 case MARVELL_KIRKWOOD_88F6180: gpp_npins = 30; break; 115 case MARVELL_KIRKWOOD_88F6192: gpp_npins = 36; break; 116 case MARVELL_KIRKWOOD_88F6281: gpp_npins = 50; break; 117 } 118 gpp_irqbase = 96; /* Main Low(32) + High(32) + Bridge(32) */ 119 #endif 120 } 121 122 static void 123 kirkwood_intr_init(void) 124 { 125 extern struct pic_softc mvsoc_bridge_pic; 126 void *ih; 127 128 pic_add(&kirkwood_pic, 0); 129 130 pic_add(&mvsoc_bridge_pic, 64); 131 ih = intr_establish(KIRKWOOD_IRQ_BRIDGE, IPL_HIGH, IST_LEVEL_HIGH, 132 pic_handle_intr, &mvsoc_bridge_pic); 133 KASSERT(ih != NULL); 134 135 find_pending_irqs = kirkwood_find_pending_irqs; 136 } 137 138 /* ARGSUSED */ 139 static void 140 kirkwood_pic_unblock_irqs(struct pic_softc *pic, size_t irqbase, 141 uint32_t irq_mask) 142 { 143 const size_t reg = KIRKWOOD_MLMB_MIRQIMLR 144 + irqbase * (KIRKWOOD_MLMB_MIRQIMHR - KIRKWOOD_MLMB_MIRQIMLR) / 32; 145 146 KASSERT(irqbase < 64); 147 write_mlmbreg(reg, read_mlmbreg(reg) | irq_mask); 148 } 149 150 /* ARGSUSED */ 151 static void 152 kirkwood_pic_block_irqs(struct pic_softc *pic, size_t irqbase, 153 uint32_t irq_mask) 154 { 155 const size_t reg = KIRKWOOD_MLMB_MIRQIMLR 156 + irqbase * (KIRKWOOD_MLMB_MIRQIMHR - KIRKWOOD_MLMB_MIRQIMLR) / 32; 157 158 KASSERT(irqbase < 64); 159 write_mlmbreg(reg, read_mlmbreg(reg) & ~irq_mask); 160 } 161 162 /* ARGSUSED */ 163 static void 164 kirkwood_pic_establish_irq(struct pic_softc *pic, struct intrsource *is) 165 { 166 /* Nothing */ 167 } 168 169 static void 170 kirkwood_pic_source_name(struct pic_softc *pic, int irq, char *buf, size_t len) 171 { 172 173 strlcpy(buf, sources[pic->pic_irqbase + irq], len); 174 } 175 176 /* 177 * Called with interrupts disabled 178 */ 179 static int 180 kirkwood_find_pending_irqs(void) 181 { 182 int ipl = 0; 183 184 uint32_t causelow = read_mlmbreg(KIRKWOOD_MLMB_MICLR); 185 uint32_t pendinglow = read_mlmbreg(KIRKWOOD_MLMB_MIRQIMLR); 186 187 pendinglow &= causelow; 188 if (pendinglow != 0) 189 ipl |= pic_mark_pending_sources(&kirkwood_pic, 0, pendinglow); 190 191 if ((causelow & KIRKWOOD_IRQ_HIGH) == KIRKWOOD_IRQ_HIGH) { 192 uint32_t causehigh = read_mlmbreg(KIRKWOOD_MLMB_MICHR); 193 uint32_t pendinghigh = read_mlmbreg(KIRKWOOD_MLMB_MIRQIMHR); 194 pendinghigh &= causehigh; 195 ipl |= pic_mark_pending_sources(&kirkwood_pic, 32, pendinghigh); 196 } 197 198 return ipl; 199 } 200 201 /* 202 * Clock functions 203 */ 204 205 void 206 kirkwood_getclks(bus_addr_t iobase) 207 { 208 uint32_t reg; 209 uint16_t model; 210 211 #define MHz * 1000 * 1000 212 213 model = mvsoc_model(); 214 if (model == MARVELL_KIRKWOOD_88F6281) 215 mvTclk = 200 MHz; 216 else /* 166MHz */ 217 mvTclk = 166666667; 218 219 reg = *(volatile uint32_t *)(iobase + KIRKWOOD_MPP_BASE + 220 KIRKWOOD_MPP_SAMPLE_AT_RESET); 221 if (model == MARVELL_KIRKWOOD_88F6180) { 222 switch (reg & 0x0000001c) { 223 case 0x00000014: mvPclk = 600 MHz; break; 224 case 0x00000018: mvPclk = 800 MHz; break; 225 default: 226 panic("unknown mvPclk\n"); 227 } 228 mvSysclk = 200 MHz; 229 } else { 230 switch (reg & 0x0040001a) { 231 case 0x00000008: mvPclk = 600 MHz; break; 232 case 0x00400008: mvPclk = 800 MHz; break; 233 case 0x0040000a: mvPclk = 1000 MHz; break; 234 case 0x00000012: mvPclk = 1200 MHz; break; 235 case 0x00000018: mvPclk = 1200 MHz; break; 236 case 0x00000002: mvPclk = 1200 MHz; break; 237 default: 238 panic("unknown mvPclk\n"); 239 } 240 241 switch (reg & 0x000001e0) { 242 case 0x00000060: mvSysclk = mvPclk * 2 / 5; break; 243 case 0x00000080: mvSysclk = mvPclk * 1 / 3; break; 244 case 0x000000c0: mvSysclk = mvPclk * 1 / 4; break; 245 default: 246 panic("unknown mvSysclk\n"); 247 } 248 } 249 250 #undef MHz 251 252 } 253