xref: /netbsd-src/sys/arch/arm/mainbus/mainbus_io.c (revision 220b5c059a84c51ea44107ea8951a57ffaecdc8c)
1 /*	$NetBSD: mainbus_io.c,v 1.6 2001/11/23 17:23:42 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c) 1997 Mark Brinicombe.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Mark Brinicombe.
18  * 4. The name of the company nor the name of the author may be used to
19  *    endorse or promote products derived from this software without specific
20  *    prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
23  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
26  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
27  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  */
34 
35 /*
36  * bus_space I/O functions for mainbus
37  */
38 
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/queue.h>
42 
43 #include <uvm/uvm.h>
44 
45 #include <machine/bus.h>
46 #include <machine/pmap.h>
47 
48 pt_entry_t *pmap_pte(pmap_t, vm_offset_t);
49 
50 /* Proto types for all the bus_space structure functions */
51 
52 bs_protos(mainbus);
53 bs_protos(bs_notimpl);
54 
55 /* Declare the mainbus bus space tag */
56 
57 struct bus_space mainbus_bs_tag = {
58 	/* cookie */
59 	NULL,
60 
61 	/* mapping/unmapping */
62 	mainbus_bs_map,
63 	mainbus_bs_unmap,
64 	mainbus_bs_subregion,
65 
66 	/* allocation/deallocation */
67 	mainbus_bs_alloc,
68 	mainbus_bs_free,
69 
70 	/* get kernel virtual address */
71 	0, /* there is no linear mapping */
72 
73 	/* Mmap bus space for user */
74 	mainbus_bs_mmap,
75 
76 	/* barrier */
77 	mainbus_bs_barrier,
78 
79 	/* read (single) */
80 	mainbus_bs_r_1,
81 	mainbus_bs_r_2,
82 	mainbus_bs_r_4,
83 	bs_notimpl_bs_r_8,
84 
85 	/* read multiple */
86 	bs_notimpl_bs_rm_1,
87 	mainbus_bs_rm_2,
88 	bs_notimpl_bs_rm_4,
89 	bs_notimpl_bs_rm_8,
90 
91 	/* read region */
92 	bs_notimpl_bs_rr_1,
93 	bs_notimpl_bs_rr_2,
94 	bs_notimpl_bs_rr_4,
95 	bs_notimpl_bs_rr_8,
96 
97 	/* write (single) */
98 	mainbus_bs_w_1,
99 	mainbus_bs_w_2,
100 	mainbus_bs_w_4,
101 	bs_notimpl_bs_w_8,
102 
103 	/* write multiple */
104 	mainbus_bs_wm_1,
105 	mainbus_bs_wm_2,
106 	bs_notimpl_bs_wm_4,
107 	bs_notimpl_bs_wm_8,
108 
109 	/* write region */
110 	bs_notimpl_bs_wr_1,
111 	bs_notimpl_bs_wr_2,
112 	bs_notimpl_bs_wr_4,
113 	bs_notimpl_bs_wr_8,
114 
115 	bs_notimpl_bs_sm_1,
116 	bs_notimpl_bs_sm_2,
117 	bs_notimpl_bs_sm_4,
118 	bs_notimpl_bs_sm_8,
119 
120 	/* set region */
121 	bs_notimpl_bs_sr_1,
122 	bs_notimpl_bs_sr_2,
123 	bs_notimpl_bs_sr_4,
124 	bs_notimpl_bs_sr_8,
125 
126 	/* copy */
127 	bs_notimpl_bs_c_1,
128 	bs_notimpl_bs_c_2,
129 	bs_notimpl_bs_c_4,
130 	bs_notimpl_bs_c_8,
131 };
132 
133 /* bus space functions */
134 
135 int
136 mainbus_bs_map(t, bpa, size, cacheable, bshp)
137 	void *t;
138 	bus_addr_t bpa;
139 	bus_size_t size;
140 	int cacheable;
141 	bus_space_handle_t *bshp;
142 {
143 	u_long startpa, endpa, pa;
144 	vaddr_t va;
145 	pt_entry_t *pte;
146 
147 	if ((u_long)bpa > (u_long)KERNEL_SPACE_START) {
148 		/* XXX This is a temporary hack to aid transition. */
149 		*bshp = bpa;
150 		return(0);
151 	}
152 
153 	startpa = trunc_page(bpa);
154 	endpa = round_page(bpa + size);
155 
156 	/* XXX use extent manager to check duplicate mapping */
157 
158 	va = uvm_km_valloc(kernel_map, endpa - startpa);
159 	if (! va)
160 		return(ENOMEM);
161 
162 	*bshp = (bus_space_handle_t)(va + (bpa - startpa));
163 
164 	for(pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
165 		pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE);
166 		pte = pmap_pte(pmap_kernel(), va);
167 		if (cacheable)
168 			*pte |= PT_CACHEABLE;
169 		else
170 			*pte &= ~PT_CACHEABLE;
171 	}
172 	pmap_update(pmap_kernel());
173 
174 	return(0);
175 }
176 
177 int
178 mainbus_bs_alloc(t, rstart, rend, size, alignment, boundary, cacheable,
179     bpap, bshp)
180 	void *t;
181 	bus_addr_t rstart, rend;
182 	bus_size_t size, alignment, boundary;
183 	int cacheable;
184 	bus_addr_t *bpap;
185 	bus_space_handle_t *bshp;
186 {
187 	panic("mainbus_bs_alloc(): Help!\n");
188 }
189 
190 
191 void
192 mainbus_bs_unmap(t, bsh, size)
193 	void *t;
194 	bus_space_handle_t bsh;
195 	bus_size_t size;
196 {
197 	/*
198 	 * Temporary implementation
199 	 */
200 }
201 
202 void
203 mainbus_bs_free(t, bsh, size)
204 	void *t;
205 	bus_space_handle_t bsh;
206 	bus_size_t size;
207 {
208 
209 	panic("mainbus_bs_free(): Help!\n");
210 	/* mainbus_bs_unmap() does all that we need to do. */
211 /*	mainbus_bs_unmap(t, bsh, size);*/
212 }
213 
214 int
215 mainbus_bs_subregion(t, bsh, offset, size, nbshp)
216 	void *t;
217 	bus_space_handle_t bsh;
218 	bus_size_t offset, size;
219 	bus_space_handle_t *nbshp;
220 {
221 
222 	*nbshp = bsh + offset;
223 	return (0);
224 }
225 
226 paddr_t
227 mainbus_bs_mmap(t, paddr, offset, prot, flags)
228 	void *t;
229 	bus_addr_t paddr;
230 	off_t offset;
231 	int prot;
232 	int flags;
233 {
234 	/*
235 	 * mmap from address `paddr+offset' for one page
236 	 */
237 	 return (arm_byte_to_page((paddr + offset)));
238 }
239 
240 void
241 mainbus_bs_barrier(t, bsh, offset, len, flags)
242 	void *t;
243 	bus_space_handle_t bsh;
244 	bus_size_t offset, len;
245 	int flags;
246 {
247 }
248 
249 /* End of mainbus_io.c */
250