xref: /netbsd-src/sys/arch/arm/mainbus/mainbus.c (revision 82d56013d7b633d116a93943de88e08335357a7c)
1 /* $NetBSD: mainbus.c,v 1.22 2021/04/24 23:36:27 thorpej Exp $ */
2 
3 /*
4  * Copyright (c) 1994,1995 Mark Brinicombe.
5  * Copyright (c) 1994 Brini.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *	This product includes software developed by Brini.
19  * 4. The name of the company nor the name of the author may be used to
20  *    endorse or promote products derived from this software without specific
21  *    prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
24  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  *
35  * RiscBSD kernel project
36  *
37  * mainbus.c
38  *
39  * mainbus configuration
40  *
41  * Created      : 15/12/94
42  */
43 
44 #include <sys/cdefs.h>
45 __KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.22 2021/04/24 23:36:27 thorpej Exp $");
46 
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/kernel.h>
50 #include <sys/conf.h>
51 #include <sys/malloc.h>
52 #include <sys/device.h>
53 
54 #if defined(arm32)		/* XXX */
55 #include <machine/io.h>
56 #endif
57 #include <sys/bus.h>
58 #include <arm/mainbus/mainbus.h>
59 #include "locators.h"
60 
61 /*
62  * mainbus is a root device so we a bus space tag to pass to children
63  *
64  * The tag is provided by mainbus_io.c and mainbus_io_asm.S
65  */
66 
67 extern struct bus_space mainbus_bs_tag;
68 
69 /* Prototypes for functions provided */
70 
71 static int  mainbusmatch(device_t, cfdata_t, void *);
72 static void mainbusattach(device_t, device_t, void *);
73 static int  mainbusprint(void *aux, const char *mainbus);
74 static int  mainbussearch(device_t, cfdata_t,
75 				const int *, void *);
76 
77 /* attach and device structures for the device */
78 
79 CFATTACH_DECL_NEW(mainbus, 0,
80     mainbusmatch, mainbusattach, NULL, NULL);
81 
82 /*
83  * int mainbusmatch(device_t parent, cfdata_t cf, void *aux)
84  *
85  * Always match for unit 0
86  */
87 
88 static int
89 mainbusmatch(device_t parent, cfdata_t cf, void *aux)
90 {
91 	return (1);
92 }
93 
94 /*
95  * int mainbusprint(void *aux, const char *mainbus)
96  *
97  * print routine used during config of children
98  */
99 
100 static int
101 mainbusprint(void *aux, const char *mainbus)
102 {
103 	struct mainbus_attach_args *mb = aux;
104 
105 	if (mb->mb_iobase != MAINBUSCF_BASE_DEFAULT)
106 		aprint_normal(" base 0x%x", mb->mb_iobase);
107 	if (mb->mb_iosize > 1)
108 		aprint_normal("-0x%x", mb->mb_iobase + mb->mb_iosize - 1);
109 	if (mb->mb_irq != -1)
110 		aprint_normal(" irq %d", mb->mb_irq);
111 	if (mb->mb_drq != -1)
112 		aprint_normal(" drq 0x%08x", mb->mb_drq);
113 	if (mb->mb_core != MAINBUSCF_CORE_DEFAULT)
114 		aprint_normal(" core %d", mb->mb_core);
115 
116 /* XXXX print flags */
117 	return (QUIET);
118 }
119 
120 /*
121  * int mainbussearch(device_t parent, device_t self, void *aux)
122  *
123  * search routine used during the config of children
124  */
125 
126 static int
127 mainbussearch(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
128 {
129 	struct mainbus_attach_args mb;
130 	int tryagain;
131 
132 	do {
133 		if (cf->cf_loc[MAINBUSCF_BASE] == MAINBUSCF_BASE_DEFAULT) {
134 			mb.mb_iobase = MAINBUSCF_BASE_DEFAULT;
135 			mb.mb_iosize = 0;
136 			mb.mb_drq = MAINBUSCF_DACK_DEFAULT;
137 			mb.mb_irq = MAINBUSCF_IRQ_DEFAULT;
138 		} else {
139 			mb.mb_iobase = cf->cf_loc[MAINBUSCF_BASE];
140 #if defined(arm32) && !defined(EB7500ATX)
141 			mb.mb_iobase += IO_CONF_BASE;
142 #endif
143 			mb.mb_iosize = cf->cf_loc[MAINBUSCF_SIZE];
144 			mb.mb_drq = cf->cf_loc[MAINBUSCF_DACK];
145 			mb.mb_irq = cf->cf_loc[MAINBUSCF_IRQ];
146 		}
147 		mb.mb_core = cf->cf_loc[MAINBUSCF_CORE];
148 		mb.mb_intrbase = cf->cf_loc[MAINBUSCF_INTRBASE];
149 		mb.mb_iot = &mainbus_bs_tag;
150 
151 		tryagain = 0;
152 		if (config_probe(parent, cf, &mb)) {
153 			config_attach(parent, cf, &mb, mainbusprint, CFARG_EOL);
154 #ifdef MULTIPROCESSOR
155 			tryagain = (cf->cf_fstate == FSTATE_STAR);
156 #endif
157 		}
158 	} while (tryagain);
159 
160 	return (0);
161 }
162 
163 /*
164  * void mainbusattach(device_t parent, device_t self, void *aux)
165  *
166  * probe and attach all children
167  */
168 
169 static void
170 mainbusattach(device_t parent, device_t self, void *aux)
171 {
172 	aprint_naive("\n");
173 	aprint_normal("\n");
174 
175 	config_search(self, NULL,
176 	    CFARG_SEARCH, mainbussearch,
177 	    CFARG_EOL);
178 }
179 
180 /* End of mainbus.c */
181