xref: /netbsd-src/sys/arch/arm/iomd/iomdiic.c (revision bdc22b2e01993381dcefeff2bc9b56ca75a4235c)
1 /*	$NetBSD: iomdiic.c,v 1.8 2016/02/14 19:54:20 chs Exp $	*/
2 
3 /*
4  * Copyright (c) 2003 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed for the NetBSD Project by
20  *      Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #include <sys/param.h>
39 #include <sys/device.h>
40 #include <sys/kernel.h>
41 #include <sys/systm.h>
42 #include <sys/mutex.h>
43 #include <sys/bus.h>
44 #include <sys/cpu.h>
45 
46 #include <arm/iomd/iomdreg.h>
47 #include <arm/iomd/iomdvar.h>
48 
49 #include <dev/i2c/i2cvar.h>
50 #include <dev/i2c/i2c_bitbang.h>
51 
52 #include <arm/iomd/iomdiicvar.h>
53 
54 struct iomdiic_softc {
55 	device_t sc_dev;
56 	bus_space_tag_t sc_st;
57 	bus_space_handle_t sc_sh;
58 
59 	struct i2c_controller sc_i2c;
60 	kmutex_t sc_buslock;
61 
62 	/*
63 	 * The SDA pin is open-drain, so we make it an input by
64 	 * writing a 1 to it.
65 	 */
66 	uint8_t sc_iomd_iocr;
67 };
68 
69 static int	iomdiic_acquire_bus(void *, int);
70 static void	iomdiic_release_bus(void *, int);
71 
72 static int	iomdiic_send_start(void *, int);
73 static int	iomdiic_send_stop(void *, int);
74 static int	iomdiic_initiate_xfer(void *, i2c_addr_t, int);
75 static int	iomdiic_read_byte(void *, uint8_t *, int);
76 static int	iomdiic_write_byte(void *, uint8_t, int);
77 
78 #define	IOMDIIC_READ	 *(volatile uint8_t *)(IOMD_ADDRESS(IOMD_IOCR))
79 #define	IOMDIIC_WRITE(x) *(volatile uint8_t *)(IOMD_ADDRESS(IOMD_IOCR)) = (x)
80 
81 #define	IOMD_IOCR_SDA		0x01
82 #define	IOMD_IOCR_SCL		0x02
83 
84 static void
85 iomdiic_bb_set_bits(void *cookie, uint32_t bits)
86 {
87 	struct iomdiic_softc *sc = cookie;
88 
89 	IOMDIIC_WRITE((IOMDIIC_READ & ~(IOMD_IOCR_SDA|IOMD_IOCR_SCL)) |
90 	    sc->sc_iomd_iocr | bits);
91 }
92 
93 static void
94 iomdiic_bb_set_dir(void *cookie, uint32_t bits)
95 {
96 	struct iomdiic_softc *sc = cookie;
97 
98 	sc->sc_iomd_iocr = bits;
99 }
100 
101 static uint32_t
102 iomdiic_bb_read_bits(void *cookie)
103 {
104 
105 	return (IOMDIIC_READ);
106 }
107 
108 static const struct i2c_bitbang_ops iomdiic_bbops = {
109 	iomdiic_bb_set_bits,
110 	iomdiic_bb_set_dir,
111 	iomdiic_bb_read_bits,
112 	{
113 		IOMD_IOCR_SDA,		/* SDA */
114 		IOMD_IOCR_SCL,		/* SCL */
115 		0,			/* SDA is output */
116 		IOMD_IOCR_SDA,		/* SDA is input */
117 	}
118 };
119 
120 static int
121 iomdiic_match(device_t parent, cfdata_t cf, void *aux)
122 {
123 	struct iic_attach_args *ia = aux;
124 
125 	if (strcmp(ia->ia_name, "iic") == 0) return 1;
126 	return 0;
127 }
128 
129 static void
130 iomdiic_attach(device_t parent, device_t self, void *aux)
131 {
132 	struct iomdiic_softc *sc = device_private(self);
133 	struct i2cbus_attach_args iba;
134 
135 	aprint_normal("\n");
136 
137 	sc->sc_dev = self;
138 
139 	mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_NONE);
140 
141 	sc->sc_i2c.ic_cookie = sc;
142 	sc->sc_i2c.ic_acquire_bus = iomdiic_acquire_bus;
143 	sc->sc_i2c.ic_release_bus = iomdiic_release_bus;
144 	sc->sc_i2c.ic_send_start = iomdiic_send_start;
145 	sc->sc_i2c.ic_send_stop = iomdiic_send_stop;
146 	sc->sc_i2c.ic_initiate_xfer = iomdiic_initiate_xfer;
147 	sc->sc_i2c.ic_read_byte = iomdiic_read_byte;
148 	sc->sc_i2c.ic_write_byte = iomdiic_write_byte;
149 
150 	memset(&iba, 0, sizeof(iba));
151 	iba.iba_tag = &sc->sc_i2c;
152 	(void) config_found_ia(sc->sc_dev, "i2cbus", &iba, iicbus_print);
153 }
154 
155 CFATTACH_DECL_NEW(iomdiic, sizeof(struct iomdiic_softc),
156     iomdiic_match, iomdiic_attach, NULL, NULL);
157 
158 i2c_tag_t
159 iomdiic_bootstrap_cookie(void)
160 {
161 	static struct iomdiic_softc sc;
162 	static struct device dev;
163 
164 	/* XXX Yuck. */
165 	strcpy(dev.dv_xname, "iomdiicboot");
166 
167 	sc.sc_dev = &dev;
168 	sc.sc_i2c.ic_cookie = &sc;
169 	sc.sc_i2c.ic_acquire_bus = iomdiic_acquire_bus;
170 	sc.sc_i2c.ic_release_bus = iomdiic_release_bus;
171 	sc.sc_i2c.ic_send_start = iomdiic_send_start;
172 	sc.sc_i2c.ic_send_stop = iomdiic_send_stop;
173 	sc.sc_i2c.ic_initiate_xfer = iomdiic_initiate_xfer;
174 	sc.sc_i2c.ic_read_byte = iomdiic_read_byte;
175 	sc.sc_i2c.ic_write_byte = iomdiic_write_byte;
176 
177 	return ((void *) &sc.sc_i2c);
178 }
179 
180 static int
181 iomdiic_acquire_bus(void *cookie, int flags)
182 {
183 	struct iomdiic_softc *sc = cookie;
184 
185 	/* XXX What should we do for the polling case? */
186 	if (flags & I2C_F_POLL)
187 		return (0);
188 
189 	mutex_enter(&sc->sc_buslock);
190 	return (0);
191 }
192 
193 static void
194 iomdiic_release_bus(void *cookie, int flags)
195 {
196 	struct iomdiic_softc *sc = cookie;
197 
198 	/* XXX See above. */
199 	if (flags & I2C_F_POLL)
200 		return;
201 
202 	mutex_exit(&sc->sc_buslock);
203 }
204 
205 static int
206 iomdiic_send_start(void *cookie, int flags)
207 {
208 
209 	return (i2c_bitbang_send_start(cookie, flags, &iomdiic_bbops));
210 }
211 
212 static int
213 iomdiic_send_stop(void *cookie, int flags)
214 {
215 
216 	return (i2c_bitbang_send_stop(cookie, flags, &iomdiic_bbops));
217 }
218 
219 static int
220 iomdiic_initiate_xfer(void *cookie, i2c_addr_t addr, int flags)
221 {
222 
223 	return (i2c_bitbang_initiate_xfer(cookie, addr, flags, &iomdiic_bbops));
224 }
225 
226 static int
227 iomdiic_read_byte(void *cookie, uint8_t *bytep, int flags)
228 {
229 
230 	return (i2c_bitbang_read_byte(cookie, bytep, flags, &iomdiic_bbops));
231 }
232 
233 static int
234 iomdiic_write_byte(void *cookie, uint8_t byte, int flags)
235 {
236 
237 	return (i2c_bitbang_write_byte(cookie, byte, flags, &iomdiic_bbops));
238 }
239