1 /* $NetBSD: iomd_irqhandler.c,v 1.11 2006/08/05 18:22:57 bjh21 Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Mark Brinicombe 21 * for the NetBSD Project. 22 * 4. The name of the company nor the name of the author may be used to 23 * endorse or promote products derived from this software without specific 24 * prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 27 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 28 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 29 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 30 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 31 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 35 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * IRQ/FIQ initialisation, claim, release and handler routines 38 * 39 * from: irqhandler.c,v 1.14 1997/04/02 21:52:19 christos Exp $ 40 */ 41 42 #include <sys/cdefs.h> 43 __KERNEL_RCSID(0, "$NetBSD: iomd_irqhandler.c,v 1.11 2006/08/05 18:22:57 bjh21 Exp $"); 44 45 #include "opt_irqstats.h" 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/syslog.h> 50 #include <sys/malloc.h> 51 #include <uvm/uvm_extern.h> 52 53 #include <arm/iomd/iomdreg.h> 54 #include <arm/iomd/iomdvar.h> 55 56 #include <machine/intr.h> 57 #include <machine/cpu.h> 58 #include <arm/arm32/katelib.h> 59 60 irqhandler_t *irqhandlers[NIRQS]; 61 62 int current_intr_depth; 63 u_int current_mask; 64 u_int actual_mask; 65 u_int disabled_mask; 66 u_int spl_mask; 67 u_int irqmasks[IPL_LEVELS]; 68 69 extern u_int soft_interrupts; /* Only so we can initialise it */ 70 71 extern char *_intrnames; 72 73 /* Prototypes */ 74 75 extern void set_spl_masks(void); 76 77 /* 78 * void irq_init(void) 79 * 80 * Initialise the IRQ/FIQ sub system 81 */ 82 83 void 84 irq_init(void) 85 { 86 int loop; 87 88 /* Clear all the IRQ handlers and the irq block masks */ 89 for (loop = 0; loop < NIRQS; ++loop) 90 irqhandlers[loop] = NULL; 91 92 /* Clear the IRQ/FIQ masks in the IOMD */ 93 IOMD_WRITE_BYTE(IOMD_IRQMSKA, 0x00); 94 IOMD_WRITE_BYTE(IOMD_IRQMSKB, 0x00); 95 96 switch (IOMD_ID) { 97 case RPC600_IOMD_ID: 98 break; 99 case ARM7500_IOC_ID: 100 case ARM7500FE_IOC_ID: 101 IOMD_WRITE_BYTE(IOMD_IRQMSKC, 0x00); 102 IOMD_WRITE_BYTE(IOMD_IRQMSKD, 0x00); 103 break; 104 default: 105 printf("Unknown IOMD id (%d) found in irq_init()\n", IOMD_ID); 106 } 107 108 IOMD_WRITE_BYTE(IOMD_FIQMSK, 0x00); 109 IOMD_WRITE_BYTE(IOMD_DMAMSK, 0x00); 110 111 /* 112 * Setup the irqmasks for the different Interrupt Priority Levels 113 * We will start with no bits set and these will be updated as handlers 114 * are installed at different IPL's. 115 */ 116 for (loop = 0; loop < IPL_LEVELS; ++loop) 117 irqmasks[loop] = 0; 118 119 current_intr_depth = 0; 120 current_mask = 0x00000000; 121 disabled_mask = 0x00000000; 122 actual_mask = 0x00000000; 123 spl_mask = 0x00000000; 124 soft_interrupts = 0x00000000; 125 126 set_spl_masks(); 127 128 /* Enable IRQ's and FIQ's */ 129 enable_interrupts(I32_bit | F32_bit); 130 } 131 132 133 /* 134 * int irq_claim(int irq, irqhandler_t *handler) 135 * 136 * Enable an IRQ and install a handler for it. 137 */ 138 139 int 140 irq_claim(int irq, irqhandler_t *handler) 141 { 142 int level; 143 u_int oldirqstate; 144 145 #ifdef DIAGNOSTIC 146 /* Sanity check */ 147 if (handler == NULL) 148 panic("NULL interrupt handler"); 149 if (handler->ih_func == NULL) 150 panic("Interrupt handler does not have a function"); 151 #endif /* DIAGNOSTIC */ 152 153 /* 154 * IRQ_INSTRUCT indicates that we should get the irq number 155 * from the irq structure 156 */ 157 if (irq == IRQ_INSTRUCT) 158 irq = handler->ih_num; 159 160 /* Make sure the irq number is valid */ 161 if (irq < 0 || irq >= NIRQS) 162 return -1; 163 164 /* Make sure the level is valid */ 165 if (handler->ih_level < 0 || handler->ih_level >= IPL_LEVELS) 166 return -1; 167 168 oldirqstate = disable_interrupts(I32_bit); 169 170 /* Attach handler at top of chain */ 171 handler->ih_next = irqhandlers[irq]; 172 irqhandlers[irq] = handler; 173 174 /* 175 * Reset the flags for this handler. 176 * As the handler is now in the chain mark it as active. 177 */ 178 handler->ih_flags = 0 | IRQ_FLAG_ACTIVE; 179 180 /* 181 * Record the interrupt number for accounting. 182 * Done here as the accounting number may not be the same as the 183 * IRQ number though for the moment they are 184 */ 185 handler->ih_num = irq; 186 187 #ifdef IRQSTATS 188 /* Get the interrupt name from the head of the list */ 189 if (handler->ih_name) { 190 char *ptr = _intrnames + (irq * 14); 191 strcpy(ptr, " "); 192 strncpy(ptr, handler->ih_name, 193 min(strlen(handler->ih_name), 13)); 194 } else { 195 char *ptr = _intrnames + (irq * 14); 196 sprintf(ptr, "irq %2d ", irq); 197 } 198 #endif /* IRQSTATS */ 199 200 /* 201 * Update the irq masks. 202 * Find the lowest interrupt priority on the irq chain. 203 * Interrupt is allowable at priorities lower than this. 204 * If ih_level is out of range then don't bother to update 205 * the masks. 206 */ 207 if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) { 208 irqhandler_t *ptr; 209 210 /* 211 * Find the lowest interrupt priority on the irq chain. 212 * Interrupt is allowable at priorities lower than this. 213 */ 214 ptr = irqhandlers[irq]; 215 if (ptr) { 216 int max_level; 217 218 level = ptr->ih_level - 1; 219 max_level = ptr->ih_level - 1; 220 while (ptr) { 221 if (ptr->ih_level - 1 < level) 222 level = ptr->ih_level - 1; 223 else if (ptr->ih_level - 1 > max_level) 224 max_level = ptr->ih_level - 1; 225 ptr = ptr->ih_next; 226 } 227 /* Clear out any levels that we cannot now allow */ 228 while (max_level >=0 && max_level > level) { 229 irqmasks[max_level] &= ~(1 << irq); 230 --max_level; 231 } 232 while (level >= 0) { 233 irqmasks[level] |= (1 << irq); 234 --level; 235 } 236 } 237 238 #include "sl.h" 239 #include "ppp.h" 240 #if NSL > 0 || NPPP > 0 241 /* In the presence of SLIP or PPP, splimp > spltty. */ 242 irqmasks[IPL_NET] &= irqmasks[IPL_TTY]; 243 #endif 244 } 245 246 enable_irq(irq); 247 set_spl_masks(); 248 restore_interrupts(oldirqstate); 249 250 return 0; 251 } 252 253 254 /* 255 * int irq_release(int irq, irqhandler_t *handler) 256 * 257 * Disable an IRQ and remove a handler for it. 258 */ 259 260 int 261 irq_release(int irq, irqhandler_t *handler) 262 { 263 int level; 264 irqhandler_t *irqhand; 265 irqhandler_t **prehand; 266 #ifdef IRQSTATS 267 extern char *_intrnames; 268 #endif 269 270 /* 271 * IRQ_INSTRUCT indicates that we should get the irq number 272 * from the irq structure 273 */ 274 if (irq == IRQ_INSTRUCT) 275 irq = handler->ih_num; 276 277 /* Make sure the irq number is valid */ 278 if (irq < 0 || irq >= NIRQS) 279 return(-1); 280 281 /* Locate the handler */ 282 irqhand = irqhandlers[irq]; 283 prehand = &irqhandlers[irq]; 284 285 while (irqhand && handler != irqhand) { 286 prehand = &irqhand->ih_next; 287 irqhand = irqhand->ih_next; 288 } 289 290 /* Remove the handler if located */ 291 if (irqhand) 292 *prehand = irqhand->ih_next; 293 else 294 return -1; 295 296 /* Now the handler has been removed from the chain mark is as inactive */ 297 irqhand->ih_flags &= ~IRQ_FLAG_ACTIVE; 298 299 /* Make sure the head of the handler list is active */ 300 if (irqhandlers[irq]) 301 irqhandlers[irq]->ih_flags |= IRQ_FLAG_ACTIVE; 302 303 #ifdef IRQSTATS 304 /* Get the interrupt name from the head of the list */ 305 if (irqhandlers[irq] && irqhandlers[irq]->ih_name) { 306 char *ptr = _intrnames + (irq * 14); 307 strcpy(ptr, " "); 308 strncpy(ptr, irqhandlers[irq]->ih_name, 309 min(strlen(irqhandlers[irq]->ih_name), 13)); 310 } else { 311 char *ptr = _intrnames + (irq * 14); 312 sprintf(ptr, "irq %2d ", irq); 313 } 314 #endif /* IRQSTATS */ 315 316 /* 317 * Update the irq masks. 318 * If ih_level is out of range then don't bother to update 319 * the masks. 320 */ 321 if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) { 322 irqhandler_t *ptr; 323 324 /* Clean the bit from all the masks */ 325 for (level = 0; level < IPL_LEVELS; ++level) 326 irqmasks[level] &= ~(1 << irq); 327 328 /* 329 * Find the lowest interrupt priority on the irq chain. 330 * Interrupt is allowable at priorities lower than this. 331 */ 332 ptr = irqhandlers[irq]; 333 if (ptr) { 334 level = ptr->ih_level - 1; 335 while (ptr) { 336 if (ptr->ih_level - 1 < level) 337 level = ptr->ih_level - 1; 338 ptr = ptr->ih_next; 339 } 340 while (level >= 0) { 341 irqmasks[level] |= (1 << irq); 342 --level; 343 } 344 } 345 } 346 347 /* 348 * Disable the appropriate mask bit if there are no handlers left for 349 * this IRQ. 350 */ 351 if (irqhandlers[irq] == NULL) 352 disable_irq(irq); 353 354 set_spl_masks(); 355 356 return 0; 357 } 358 359 360 void * 361 intr_claim(int irq, int level, const char *name, int (*ih_func)(void *), 362 void *ih_arg) 363 { 364 irqhandler_t *ih; 365 366 ih = malloc(sizeof(*ih), M_DEVBUF, M_NOWAIT); 367 if (!ih) 368 panic("intr_claim(): Cannot malloc handler memory"); 369 370 ih->ih_level = level; 371 ih->ih_name = name; 372 ih->ih_func = ih_func; 373 ih->ih_arg = ih_arg; 374 ih->ih_flags = 0; 375 376 if (irq_claim(irq, ih) != 0) 377 return NULL; 378 return ih; 379 } 380 381 382 int 383 intr_release(void *arg) 384 { 385 irqhandler_t *ih = (irqhandler_t *)arg; 386 387 if (irq_release(ih->ih_num, ih) == 0) { 388 free(ih, M_DEVBUF); 389 return 0 ; 390 } 391 return 1; 392 } 393 394 #if 0 395 u_int 396 disable_interrupts(u_int mask) 397 { 398 u_int cpsr; 399 400 cpsr = SetCPSR(mask, mask); 401 return cpsr; 402 } 403 404 405 u_int 406 restore_interrupts(u_int old_cpsr) 407 { 408 int mask = I32_bit | F32_bit; 409 410 return SetCPSR(mask, old_cpsr & mask); 411 } 412 413 414 u_int 415 enable_interrupts(u_int mask) 416 { 417 418 return SetCPSR(mask, 0); 419 } 420 #endif 421 422 /* 423 * void disable_irq(int irq) 424 * 425 * Disables a specific irq. The irq is removed from the master irq mask 426 */ 427 428 void 429 disable_irq(int irq) 430 { 431 u_int oldirqstate; 432 433 oldirqstate = disable_interrupts(I32_bit); 434 current_mask &= ~(1 << irq); 435 irq_setmasks(); 436 restore_interrupts(oldirqstate); 437 } 438 439 440 /* 441 * void enable_irq(int irq) 442 * 443 * Enables a specific irq. The irq is added to the master irq mask 444 * This routine should be used with caution. A handler should already 445 * be installed. 446 */ 447 448 void 449 enable_irq(int irq) 450 { 451 u_int oldirqstate; 452 453 oldirqstate = disable_interrupts(I32_bit); 454 current_mask |= (1 << irq); 455 irq_setmasks(); 456 restore_interrupts(oldirqstate); 457 } 458 459 460 /* 461 * void stray_irqhandler(u_int mask) 462 * 463 * Handler for stray interrupts. This gets called if a handler cannot be 464 * found for an interrupt. 465 */ 466 467 void 468 stray_irqhandler(u_int mask) 469 { 470 static u_int stray_irqs = 0; 471 472 if (++stray_irqs <= 8) 473 log(LOG_ERR, "Stray interrupt %08x%s\n", mask, 474 stray_irqs >= 8 ? ": stopped logging" : ""); 475 } 476