1 /* $NetBSD: iomd_irqhandler.c,v 1.15 2007/10/17 19:53:42 garbled Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Mark Brinicombe 21 * for the NetBSD Project. 22 * 4. The name of the company nor the name of the author may be used to 23 * endorse or promote products derived from this software without specific 24 * prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 27 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 28 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 29 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 30 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 31 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 35 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * IRQ/FIQ initialisation, claim, release and handler routines 38 * 39 * from: irqhandler.c,v 1.14 1997/04/02 21:52:19 christos Exp $ 40 */ 41 42 #include <sys/cdefs.h> 43 __KERNEL_RCSID(0, "$NetBSD: iomd_irqhandler.c,v 1.15 2007/10/17 19:53:42 garbled Exp $"); 44 45 #include "opt_irqstats.h" 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/syslog.h> 50 #include <sys/malloc.h> 51 #include <uvm/uvm_extern.h> 52 53 #include <arm/iomd/iomdreg.h> 54 #include <arm/iomd/iomdvar.h> 55 56 #include <machine/intr.h> 57 #include <machine/cpu.h> 58 #include <arm/arm32/katelib.h> 59 60 irqhandler_t *irqhandlers[NIRQS]; 61 62 int current_intr_depth; 63 u_int current_mask; 64 u_int actual_mask; 65 u_int disabled_mask; 66 u_int irqmasks[IPL_LEVELS]; 67 68 extern char *_intrnames; 69 70 /* Prototypes */ 71 72 extern void set_spl_masks(void); 73 74 /* 75 * void irq_init(void) 76 * 77 * Initialise the IRQ/FIQ sub system 78 */ 79 80 void 81 irq_init(void) 82 { 83 int loop; 84 85 /* Clear all the IRQ handlers and the irq block masks */ 86 for (loop = 0; loop < NIRQS; ++loop) 87 irqhandlers[loop] = NULL; 88 89 /* Clear the IRQ/FIQ masks in the IOMD */ 90 IOMD_WRITE_BYTE(IOMD_IRQMSKA, 0x00); 91 IOMD_WRITE_BYTE(IOMD_IRQMSKB, 0x00); 92 93 switch (IOMD_ID) { 94 case RPC600_IOMD_ID: 95 break; 96 case ARM7500_IOC_ID: 97 case ARM7500FE_IOC_ID: 98 IOMD_WRITE_BYTE(IOMD_IRQMSKC, 0x00); 99 IOMD_WRITE_BYTE(IOMD_IRQMSKD, 0x00); 100 break; 101 default: 102 printf("Unknown IOMD id (%d) found in irq_init()\n", IOMD_ID); 103 } 104 105 IOMD_WRITE_BYTE(IOMD_FIQMSK, 0x00); 106 IOMD_WRITE_BYTE(IOMD_DMAMSK, 0x00); 107 108 /* 109 * Setup the irqmasks for the different Interrupt Priority Levels 110 * We will start with no bits set and these will be updated as handlers 111 * are installed at different IPL's. 112 */ 113 for (loop = 0; loop < IPL_LEVELS; ++loop) 114 irqmasks[loop] = 0; 115 116 current_intr_depth = 0; 117 current_mask = 0x00000000; 118 disabled_mask = 0x00000000; 119 actual_mask = 0x00000000; 120 121 set_spl_masks(); 122 123 /* Enable IRQ's and FIQ's */ 124 enable_interrupts(I32_bit | F32_bit); 125 } 126 127 128 /* 129 * int irq_claim(int irq, irqhandler_t *handler) 130 * 131 * Enable an IRQ and install a handler for it. 132 */ 133 134 int 135 irq_claim(int irq, irqhandler_t *handler) 136 { 137 int level; 138 u_int oldirqstate; 139 140 #ifdef DIAGNOSTIC 141 /* Sanity check */ 142 if (handler == NULL) 143 panic("NULL interrupt handler"); 144 if (handler->ih_func == NULL) 145 panic("Interrupt handler does not have a function"); 146 #endif /* DIAGNOSTIC */ 147 148 /* 149 * IRQ_INSTRUCT indicates that we should get the irq number 150 * from the irq structure 151 */ 152 if (irq == IRQ_INSTRUCT) 153 irq = handler->ih_num; 154 155 /* Make sure the irq number is valid */ 156 if (irq < 0 || irq >= NIRQS) 157 return -1; 158 159 /* Make sure the level is valid */ 160 if (handler->ih_level < 0 || handler->ih_level >= IPL_LEVELS) 161 return -1; 162 163 oldirqstate = disable_interrupts(I32_bit); 164 165 /* Attach handler at top of chain */ 166 handler->ih_next = irqhandlers[irq]; 167 irqhandlers[irq] = handler; 168 169 /* 170 * Reset the flags for this handler. 171 * As the handler is now in the chain mark it as active. 172 */ 173 handler->ih_flags = 0 | IRQ_FLAG_ACTIVE; 174 175 /* 176 * Record the interrupt number for accounting. 177 * Done here as the accounting number may not be the same as the 178 * IRQ number though for the moment they are 179 */ 180 handler->ih_num = irq; 181 182 #ifdef IRQSTATS 183 /* Get the interrupt name from the head of the list */ 184 if (handler->ih_name) { 185 char *ptr = _intrnames + (irq * 14); 186 strcpy(ptr, " "); 187 strncpy(ptr, handler->ih_name, 188 min(strlen(handler->ih_name), 13)); 189 } else { 190 char *ptr = _intrnames + (irq * 14); 191 sprintf(ptr, "irq %2d ", irq); 192 } 193 #endif /* IRQSTATS */ 194 195 /* 196 * Update the irq masks. 197 * Find the lowest interrupt priority on the irq chain. 198 * Interrupt is allowable at priorities lower than this. 199 * If ih_level is out of range then don't bother to update 200 * the masks. 201 */ 202 if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) { 203 irqhandler_t *ptr; 204 205 /* 206 * Find the lowest interrupt priority on the irq chain. 207 * Interrupt is allowable at priorities lower than this. 208 */ 209 ptr = irqhandlers[irq]; 210 if (ptr) { 211 int max_level; 212 213 level = ptr->ih_level - 1; 214 max_level = ptr->ih_level - 1; 215 while (ptr) { 216 if (ptr->ih_level - 1 < level) 217 level = ptr->ih_level - 1; 218 else if (ptr->ih_level - 1 > max_level) 219 max_level = ptr->ih_level - 1; 220 ptr = ptr->ih_next; 221 } 222 /* Clear out any levels that we cannot now allow */ 223 while (max_level >=0 && max_level > level) { 224 irqmasks[max_level] &= ~(1 << irq); 225 --max_level; 226 } 227 while (level >= 0) { 228 irqmasks[level] |= (1 << irq); 229 --level; 230 } 231 } 232 233 #include "sl.h" 234 #include "ppp.h" 235 #if NSL > 0 || NPPP > 0 236 /* In the presence of SLIP or PPP, splimp > spltty. */ 237 irqmasks[IPL_NET] &= irqmasks[IPL_TTY]; 238 #endif 239 } 240 241 enable_irq(irq); 242 set_spl_masks(); 243 restore_interrupts(oldirqstate); 244 245 return 0; 246 } 247 248 249 /* 250 * int irq_release(int irq, irqhandler_t *handler) 251 * 252 * Disable an IRQ and remove a handler for it. 253 */ 254 255 int 256 irq_release(int irq, irqhandler_t *handler) 257 { 258 int level; 259 irqhandler_t *irqhand; 260 irqhandler_t **prehand; 261 #ifdef IRQSTATS 262 extern char *_intrnames; 263 #endif 264 265 /* 266 * IRQ_INSTRUCT indicates that we should get the irq number 267 * from the irq structure 268 */ 269 if (irq == IRQ_INSTRUCT) 270 irq = handler->ih_num; 271 272 /* Make sure the irq number is valid */ 273 if (irq < 0 || irq >= NIRQS) 274 return(-1); 275 276 /* Locate the handler */ 277 irqhand = irqhandlers[irq]; 278 prehand = &irqhandlers[irq]; 279 280 while (irqhand && handler != irqhand) { 281 prehand = &irqhand->ih_next; 282 irqhand = irqhand->ih_next; 283 } 284 285 /* Remove the handler if located */ 286 if (irqhand) 287 *prehand = irqhand->ih_next; 288 else 289 return -1; 290 291 /* Now the handler has been removed from the chain mark is as inactive */ 292 irqhand->ih_flags &= ~IRQ_FLAG_ACTIVE; 293 294 /* Make sure the head of the handler list is active */ 295 if (irqhandlers[irq]) 296 irqhandlers[irq]->ih_flags |= IRQ_FLAG_ACTIVE; 297 298 #ifdef IRQSTATS 299 /* Get the interrupt name from the head of the list */ 300 if (irqhandlers[irq] && irqhandlers[irq]->ih_name) { 301 char *ptr = _intrnames + (irq * 14); 302 strcpy(ptr, " "); 303 strncpy(ptr, irqhandlers[irq]->ih_name, 304 min(strlen(irqhandlers[irq]->ih_name), 13)); 305 } else { 306 char *ptr = _intrnames + (irq * 14); 307 sprintf(ptr, "irq %2d ", irq); 308 } 309 #endif /* IRQSTATS */ 310 311 /* 312 * Update the irq masks. 313 * If ih_level is out of range then don't bother to update 314 * the masks. 315 */ 316 if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) { 317 irqhandler_t *ptr; 318 319 /* Clean the bit from all the masks */ 320 for (level = 0; level < IPL_LEVELS; ++level) 321 irqmasks[level] &= ~(1 << irq); 322 323 /* 324 * Find the lowest interrupt priority on the irq chain. 325 * Interrupt is allowable at priorities lower than this. 326 */ 327 ptr = irqhandlers[irq]; 328 if (ptr) { 329 level = ptr->ih_level - 1; 330 while (ptr) { 331 if (ptr->ih_level - 1 < level) 332 level = ptr->ih_level - 1; 333 ptr = ptr->ih_next; 334 } 335 while (level >= 0) { 336 irqmasks[level] |= (1 << irq); 337 --level; 338 } 339 } 340 } 341 342 /* 343 * Disable the appropriate mask bit if there are no handlers left for 344 * this IRQ. 345 */ 346 if (irqhandlers[irq] == NULL) 347 disable_irq(irq); 348 349 set_spl_masks(); 350 351 return 0; 352 } 353 354 355 void * 356 intr_claim(int irq, int level, const char *name, int (*ih_func)(void *), 357 void *ih_arg) 358 { 359 irqhandler_t *ih; 360 361 ih = malloc(sizeof(*ih), M_DEVBUF, M_NOWAIT); 362 if (!ih) 363 panic("intr_claim(): Cannot malloc handler memory"); 364 365 ih->ih_level = level; 366 ih->ih_name = name; 367 ih->ih_func = ih_func; 368 ih->ih_arg = ih_arg; 369 ih->ih_flags = 0; 370 371 if (irq_claim(irq, ih) != 0) 372 return NULL; 373 return ih; 374 } 375 376 377 int 378 intr_release(void *arg) 379 { 380 irqhandler_t *ih = (irqhandler_t *)arg; 381 382 if (irq_release(ih->ih_num, ih) == 0) { 383 free(ih, M_DEVBUF); 384 return 0 ; 385 } 386 return 1; 387 } 388 389 #if 0 390 u_int 391 disable_interrupts(u_int mask) 392 { 393 u_int cpsr; 394 395 cpsr = SetCPSR(mask, mask); 396 return cpsr; 397 } 398 399 400 u_int 401 restore_interrupts(u_int old_cpsr) 402 { 403 int mask = I32_bit | F32_bit; 404 405 return SetCPSR(mask, old_cpsr & mask); 406 } 407 408 409 u_int 410 enable_interrupts(u_int mask) 411 { 412 413 return SetCPSR(mask, 0); 414 } 415 #endif 416 417 /* 418 * void disable_irq(int irq) 419 * 420 * Disables a specific irq. The irq is removed from the master irq mask 421 */ 422 423 void 424 disable_irq(int irq) 425 { 426 u_int oldirqstate; 427 428 oldirqstate = disable_interrupts(I32_bit); 429 current_mask &= ~(1 << irq); 430 irq_setmasks(); 431 restore_interrupts(oldirqstate); 432 } 433 434 435 /* 436 * void enable_irq(int irq) 437 * 438 * Enables a specific irq. The irq is added to the master irq mask 439 * This routine should be used with caution. A handler should already 440 * be installed. 441 */ 442 443 void 444 enable_irq(int irq) 445 { 446 u_int oldirqstate; 447 448 oldirqstate = disable_interrupts(I32_bit); 449 current_mask |= (1 << irq); 450 irq_setmasks(); 451 restore_interrupts(oldirqstate); 452 } 453 454 455 /* 456 * void stray_irqhandler(u_int mask) 457 * 458 * Handler for stray interrupts. This gets called if a handler cannot be 459 * found for an interrupt. 460 */ 461 462 void 463 stray_irqhandler(u_int mask) 464 { 465 static u_int stray_irqs = 0; 466 467 if (++stray_irqs <= 8) 468 log(LOG_ERR, "Stray interrupt %08x%s\n", mask, 469 stray_irqs >= 8 ? ": stopped logging" : ""); 470 } 471