xref: /netbsd-src/sys/arch/arm/include/cpu.h (revision 8b0f9554ff8762542c4defc4f70e1eb76fb508fa)
1 /*	$NetBSD: cpu.h,v 1.48 2007/12/11 17:02:32 ad Exp $	*/
2 
3 /*
4  * Copyright (c) 1994-1996 Mark Brinicombe.
5  * Copyright (c) 1994 Brini.
6  * All rights reserved.
7  *
8  * This code is derived from software written for Brini by Mark Brinicombe
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by Brini.
21  * 4. The name of the company nor the name of the author may be used to
22  *    endorse or promote products derived from this software without specific
23  *    prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35  * SUCH DAMAGE.
36  *
37  * RiscBSD kernel project
38  *
39  * cpu.h
40  *
41  * CPU specific symbols
42  *
43  * Created      : 18/09/94
44  *
45  * Based on kate/katelib/arm6.h
46  */
47 
48 #ifndef _ARM_CPU_H_
49 #define _ARM_CPU_H_
50 
51 /*
52  * User-visible definitions
53  */
54 
55 /*  CTL_MACHDEP definitions. */
56 #define	CPU_DEBUG		1	/* int: misc kernel debug control */
57 #define	CPU_BOOTED_DEVICE	2	/* string: device we booted from */
58 #define	CPU_BOOTED_KERNEL	3	/* string: kernel we booted */
59 #define	CPU_CONSDEV		4	/* struct: dev_t of our console */
60 #define	CPU_POWERSAVE		5	/* int: use CPU powersave mode */
61 #define	CPU_MAXID		6	/* number of valid machdep ids */
62 
63 #define	CTL_MACHDEP_NAMES { \
64 	{ 0, 0 }, \
65 	{ "debug", CTLTYPE_INT }, \
66 	{ "booted_device", CTLTYPE_STRING }, \
67 	{ "booted_kernel", CTLTYPE_STRING }, \
68 	{ "console_device", CTLTYPE_STRUCT }, \
69 	{ "powersave", CTLTYPE_INT }, \
70 }
71 
72 #ifdef _KERNEL
73 
74 /*
75  * Kernel-only definitions
76  */
77 
78 #ifndef _LKM
79 #include "opt_multiprocessor.h"
80 #include "opt_lockdebug.h"
81 #endif /* !_LKM */
82 
83 #include <arm/cpuconf.h>
84 
85 #include <machine/intr.h>
86 #ifndef _LOCORE
87 #include <sys/user.h>
88 #include <machine/frame.h>
89 #include <machine/pcb.h>
90 #endif	/* !_LOCORE */
91 
92 #include <arm/armreg.h>
93 
94 #ifndef _LOCORE
95 /* 1 == use cpu_sleep(), 0 == don't */
96 extern int cpu_do_powersave;
97 #endif
98 
99 #ifdef __PROG32
100 #ifdef _LOCORE
101 #define IRQdisable \
102 	stmfd	sp!, {r0} ; \
103 	mrs	r0, cpsr ; \
104 	orr	r0, r0, #(I32_bit) ; \
105 	msr	cpsr_c, r0 ; \
106 	ldmfd	sp!, {r0}
107 
108 #define IRQenable \
109 	stmfd	sp!, {r0} ; \
110 	mrs	r0, cpsr ; \
111 	bic	r0, r0, #(I32_bit) ; \
112 	msr	cpsr_c, r0 ; \
113 	ldmfd	sp!, {r0}
114 
115 #else
116 #define IRQdisable __set_cpsr_c(I32_bit, I32_bit);
117 #define IRQenable __set_cpsr_c(I32_bit, 0);
118 #endif	/* _LOCORE */
119 #else
120 #define IRQdisable set_r15(R15_IRQ_DISABLE, R15_IRQ_DISABLE);
121 #define IRQenable set_r15(R15_IRQ_DISABLE, 0);
122 #endif
123 
124 #ifndef _LOCORE
125 
126 /* All the CLKF_* macros take a struct clockframe * as an argument. */
127 
128 /*
129  * CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the
130  * frame came from USR mode or not.
131  */
132 #ifdef __PROG32
133 #define CLKF_USERMODE(frame)	((frame->cf_if.if_spsr & PSR_MODE) == PSR_USR32_MODE)
134 #else
135 #define CLKF_USERMODE(frame)	((frame->cf_if.if_r15 & R15_MODE) == R15_MODE_USR)
136 #endif
137 
138 /*
139  * CLKF_INTR: True if we took the interrupt from inside another
140  * interrupt handler.
141  */
142 extern int current_intr_depth;
143 #ifdef __PROG32
144 /* Hack to treat FPE time as interrupt time so we can measure it */
145 #define CLKF_INTR(frame)						\
146 	((current_intr_depth > 1) ||					\
147 	    (frame->cf_if.if_spsr & PSR_MODE) == PSR_UND32_MODE)
148 #else
149 #define CLKF_INTR(frame)	(current_intr_depth > 1)
150 #endif
151 
152 /*
153  * CLKF_PC: Extract the program counter from a clockframe
154  */
155 #ifdef __PROG32
156 #define CLKF_PC(frame)		(frame->cf_if.if_pc)
157 #else
158 #define CLKF_PC(frame)		(frame->cf_if.if_r15 & R15_PC)
159 #endif
160 
161 /*
162  * LWP_PC: Find out the program counter for the given lwp.
163  */
164 #ifdef __PROG32
165 #define LWP_PC(l)	((l)->l_addr->u_pcb.pcb_tf->tf_pc)
166 #else
167 #define LWP_PC(l)	((l)->l_addr->u_pcb.pcb_tf->tf_r15 & R15_PC)
168 #endif
169 
170 /*
171  * Validate a PC or PSR for a user process.  Used by various system calls
172  * that take a context passed by the user and restore it.
173  */
174 
175 #ifdef __PROG32
176 #define VALID_R15_PSR(r15,psr)						\
177 	(((psr) & PSR_MODE) == PSR_USR32_MODE &&			\
178 		((psr) & (I32_bit | F32_bit)) == 0)
179 #else
180 #define VALID_R15_PSR(r15,psr)						\
181 	(((r15) & R15_MODE) == R15_MODE_USR &&				\
182 		((r15) & (R15_IRQ_DISABLE | R15_FIQ_DISABLE)) == 0)
183 #endif
184 
185 
186 
187 /* The address of the vector page. */
188 extern vaddr_t vector_page;
189 #ifdef __PROG32
190 void	arm32_vector_init(vaddr_t, int);
191 
192 #define	ARM_VEC_RESET			(1 << 0)
193 #define	ARM_VEC_UNDEFINED		(1 << 1)
194 #define	ARM_VEC_SWI			(1 << 2)
195 #define	ARM_VEC_PREFETCH_ABORT		(1 << 3)
196 #define	ARM_VEC_DATA_ABORT		(1 << 4)
197 #define	ARM_VEC_ADDRESS_EXCEPTION	(1 << 5)
198 #define	ARM_VEC_IRQ			(1 << 6)
199 #define	ARM_VEC_FIQ			(1 << 7)
200 
201 #define	ARM_NVEC			8
202 #define	ARM_VEC_ALL			0xffffffff
203 #endif
204 
205 /*
206  * Per-CPU information.  For now we assume one CPU.
207  */
208 
209 #include <sys/device.h>
210 #include <sys/cpu_data.h>
211 struct cpu_info {
212 	struct cpu_data ci_data;	/* MI per-cpu data */
213 	struct device *ci_dev;		/* Device corresponding to this CPU */
214 	cpuid_t ci_cpuid;
215 	u_int32_t ci_arm_cpuid;		/* aggregate CPU id */
216 	u_int32_t ci_arm_cputype;	/* CPU type */
217 	u_int32_t ci_arm_cpurev;	/* CPU revision */
218 	u_int32_t ci_ctrl;		/* The CPU control register */
219 	struct evcnt ci_arm700bugcount;
220 	int32_t ci_mtx_count;
221 	int ci_mtx_oldspl;
222 	int ci_want_resched;
223 	int ci_idepth;
224 #ifdef MULTIPROCESSOR
225 	MP_CPU_INFO_MEMBERS
226 #endif
227 };
228 
229 #ifndef MULTIPROCESSOR
230 extern struct cpu_info cpu_info_store;
231 #define	curcpu()	(&cpu_info_store)
232 #define cpu_number()	0
233 #endif
234 
235 #ifdef __PROG32
236 void	cpu_proc_fork(struct proc *, struct proc *);
237 #else
238 #define	cpu_proc_fork(p1, p2)
239 #endif
240 
241 /*
242  * Scheduling glue
243  */
244 
245 extern int astpending;
246 #define setsoftast() (astpending = 1)
247 
248 /*
249  * Notify the current process (p) that it has a signal pending,
250  * process as soon as possible.
251  */
252 
253 #define cpu_signotify(l)            setsoftast()
254 
255 /*
256  * Give a profiling tick to the current process when the user profiling
257  * buffer pages are invalid.  On the i386, request an ast to send us
258  * through trap(), marking the proc as needing a profiling tick.
259  */
260 #define	cpu_need_proftick(l)	((l)->l_pflag |= LP_OWEUPC, setsoftast())
261 
262 #ifndef acorn26
263 /*
264  * cpu device glue (belongs in cpuvar.h)
265  */
266 
267 struct device;
268 void	cpu_attach(struct device *);
269 #endif
270 
271 /*
272  * Random cruft
273  */
274 
275 struct lwp;
276 
277 /* locore.S */
278 void atomic_set_bit(u_int *, u_int);
279 void atomic_clear_bit(u_int *, u_int);
280 
281 /* cpuswitch.S */
282 struct pcb;
283 void	savectx(struct pcb *);
284 
285 /* ast.c */
286 void userret(register struct lwp *);
287 
288 /* machdep.h */
289 void bootsync(void);
290 
291 /* fault.c */
292 int badaddr_read(void *, size_t, void *);
293 
294 /* syscall.c */
295 void swi_handler(trapframe_t *);
296 
297 #endif	/* !_LOCORE */
298 
299 #endif /* _KERNEL */
300 
301 #endif /* !_ARM_CPU_H_ */
302 
303 /* End of cpu.h */
304