1 /* cpu.h,v 1.45.4.7 2008/01/28 18:20:39 matt Exp */ 2 3 /* 4 * Copyright (c) 1994-1996 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * RiscBSD kernel project 38 * 39 * cpu.h 40 * 41 * CPU specific symbols 42 * 43 * Created : 18/09/94 44 * 45 * Based on kate/katelib/arm6.h 46 */ 47 48 #ifndef _ARM_CPU_H_ 49 #define _ARM_CPU_H_ 50 51 /* 52 * User-visible definitions 53 */ 54 55 /* CTL_MACHDEP definitions. */ 56 #define CPU_DEBUG 1 /* int: misc kernel debug control */ 57 #define CPU_BOOTED_DEVICE 2 /* string: device we booted from */ 58 #define CPU_BOOTED_KERNEL 3 /* string: kernel we booted */ 59 #define CPU_CONSDEV 4 /* struct: dev_t of our console */ 60 #define CPU_POWERSAVE 5 /* int: use CPU powersave mode */ 61 #define CPU_MAXID 6 /* number of valid machdep ids */ 62 63 #ifdef _KERNEL 64 65 /* 66 * Kernel-only definitions 67 */ 68 69 #ifndef _LKM 70 #include "opt_multiprocessor.h" 71 #include "opt_cpuoptions.h" 72 #include "opt_lockdebug.h" 73 #include "opt_cputypes.h" 74 #endif /* !_LKM */ 75 76 #include <arm/cpuconf.h> 77 78 #ifndef _LOCORE 79 #include <sys/user.h> 80 #include <machine/frame.h> 81 #include <machine/pcb.h> 82 #ifdef FPU_VFP 83 #include <arm/vfpvar.h> 84 #endif 85 #endif /* !_LOCORE */ 86 87 #include <arm/armreg.h> 88 89 90 #ifndef _LOCORE 91 /* 1 == use cpu_sleep(), 0 == don't */ 92 extern int cpu_do_powersave; 93 #endif 94 95 #ifdef __PROG32 96 #ifdef _LOCORE 97 #ifdef _ARM_ARCH_6 98 #define IRQdisable cprid i 99 #define IRQenable cpsie i 100 #else 101 #define IRQdisable \ 102 stmfd sp!, {r0} ; \ 103 mrs r0, cpsr ; \ 104 orr r0, r0, #(I32_bit) ; \ 105 msr cpsr_c, r0 ; \ 106 ldmfd sp!, {r0} 107 108 #define IRQenable \ 109 stmfd sp!, {r0} ; \ 110 mrs r0, cpsr ; \ 111 bic r0, r0, #(I32_bit) ; \ 112 msr cpsr_c, r0 ; \ 113 ldmfd sp!, {r0} 114 #endif /* _ARM_ARCH_6 */ 115 116 #if defined (PROCESS_ID_IS_CURCPU) 117 #define GET_CURCPU(rX) mrc p15, 0, rX, c13, c0, 4 118 #define GET_CURLWP(rX) GET_CURCPU(rX); ldr rX, [rX, #CI_CURLWP] 119 #define GET_CURPCB(rX) GET_CURCPU(rX); ldr rX, [rX, #CI_CURPCB] 120 #elif defined (PROCESS_ID_IS_CURLWP) 121 #define GET_CURLWP(rX) mrc p15, 0, rX, c13, c0, 4 122 #define GET_CURCPU(rX) GET_CURLWP(rX); ldr rX, [rX, #L_CPU] 123 #define GET_CURPCB(rX) GET_CURLWP(rX); ldr rX, [rX, #L_ADDR] 124 #endif 125 126 #else 127 #define IRQdisable __set_cpsr_c(I32_bit, I32_bit); 128 #define IRQenable __set_cpsr_c(I32_bit, 0); 129 #endif /* _LOCORE */ 130 #else 131 #define IRQdisable set_r15(R15_IRQ_DISABLE, R15_IRQ_DISABLE); 132 #define IRQenable set_r15(R15_IRQ_DISABLE, 0); 133 #endif 134 135 #ifndef _LOCORE 136 137 /* All the CLKF_* macros take a struct clockframe * as an argument. */ 138 139 /* 140 * CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the 141 * frame came from USR mode or not. 142 */ 143 #ifdef __PROG32 144 #define CLKF_USERMODE(frame) ((frame->cf_if.if_spsr & PSR_MODE) == PSR_USR32_MODE) 145 #else 146 #define CLKF_USERMODE(frame) ((frame->cf_if.if_r15 & R15_MODE) == R15_MODE_USR) 147 #endif 148 149 /* 150 * CLKF_INTR: True if we took the interrupt from inside another 151 * interrupt handler. 152 */ 153 #ifdef __PROG32 154 /* Hack to treat FPE time as interrupt time so we can measure it */ 155 #define CLKF_INTR(frame) \ 156 ((curcpu()->ci_intr_depth > 1) || \ 157 (frame->cf_if.if_spsr & PSR_MODE) == PSR_UND32_MODE) 158 #else 159 #define CLKF_INTR(frame) (curcpu()->ci_intr_depth > 1) 160 #endif 161 162 /* 163 * CLKF_PC: Extract the program counter from a clockframe 164 */ 165 #ifdef __PROG32 166 #define CLKF_PC(frame) (frame->cf_if.if_pc) 167 #else 168 #define CLKF_PC(frame) (frame->cf_if.if_r15 & R15_PC) 169 #endif 170 171 /* 172 * LWP_PC: Find out the program counter for the given lwp. 173 */ 174 #ifdef __PROG32 175 #define LWP_PC(l) ((l)->l_addr->u_pcb.pcb_tf->tf_pc) 176 #else 177 #define LWP_PC(l) ((l)->l_addr->u_pcb.pcb_tf->tf_r15 & R15_PC) 178 #endif 179 180 /* 181 * Validate a PC or PSR for a user process. Used by various system calls 182 * that take a context passed by the user and restore it. 183 */ 184 185 #ifdef __PROG32 186 #define VALID_R15_PSR(r15,psr) \ 187 (((psr) & PSR_MODE) == PSR_USR32_MODE && \ 188 ((psr) & (I32_bit | F32_bit)) == 0) 189 #else 190 #define VALID_R15_PSR(r15,psr) \ 191 (((r15) & R15_MODE) == R15_MODE_USR && \ 192 ((r15) & (R15_IRQ_DISABLE | R15_FIQ_DISABLE)) == 0) 193 #endif 194 195 196 197 /* The address of the vector page. */ 198 extern vaddr_t vector_page; 199 #ifdef __PROG32 200 void arm32_vector_init(vaddr_t, int); 201 202 #define ARM_VEC_RESET (1 << 0) 203 #define ARM_VEC_UNDEFINED (1 << 1) 204 #define ARM_VEC_SWI (1 << 2) 205 #define ARM_VEC_PREFETCH_ABORT (1 << 3) 206 #define ARM_VEC_DATA_ABORT (1 << 4) 207 #define ARM_VEC_ADDRESS_EXCEPTION (1 << 5) 208 #define ARM_VEC_IRQ (1 << 6) 209 #define ARM_VEC_FIQ (1 << 7) 210 211 #define ARM_NVEC 8 212 #define ARM_VEC_ALL 0xffffffff 213 #endif 214 215 /* 216 * Per-CPU information. For now we assume one CPU. 217 */ 218 static inline int curcpl(void); 219 static inline void set_curcpl(int); 220 #ifdef __HAVE_FAST_SOFTINTS 221 static inline void cpu_dosoftints(void); 222 #endif 223 224 #include <sys/device.h> 225 #include <sys/cpu_data.h> 226 struct cpu_info { 227 struct cpu_data ci_data; /* MI per-cpu data */ 228 struct device *ci_dev; /* Device corresponding to this CPU */ 229 cpuid_t ci_cpuid; 230 u_int32_t ci_arm_cpuid; /* aggregate CPU id */ 231 u_int32_t ci_arm_cputype; /* CPU type */ 232 u_int32_t ci_arm_cpurev; /* CPU revision */ 233 u_int32_t ci_ctrl; /* The CPU control register */ 234 int ci_cpl; /* current processor level (spl) */ 235 int ci_astpending; /* */ 236 int ci_want_resched; /* resched() was called */ 237 int ci_intr_depth; /* */ 238 struct pcb *ci_curpcb; /* current pcb */ 239 #ifdef __HAVE_FAST_SOFTINTS 240 lwp_t *ci_softlwps[SOFTINT_COUNT]; 241 uint32_t ci_softints; 242 #endif 243 #if !defined(PROCESS_ID_IS_CURLWP) 244 lwp_t *ci_curlwp; /* current lwp */ 245 #endif 246 #ifdef _ARM_ARCH_6 247 uint32_t ci_ccnt_freq; /* cycle count frequency */ 248 #endif 249 struct evcnt ci_arm700bugcount; 250 int32_t ci_mtx_count; 251 int ci_mtx_oldspl; 252 #ifdef MULTIPROCESSOR 253 MP_CPU_INFO_MEMBERS 254 #endif 255 #ifdef FPU_VFP 256 struct vfp_info ci_vfp; 257 #endif 258 }; 259 260 #ifndef MULTIPROCESSOR 261 extern struct cpu_info cpu_info_store; 262 #if defined(PROCESS_ID_IS_CURLWP) 263 static inline struct lwp * 264 _curlwp(void) 265 { 266 struct lwp *l; 267 __asm("mrc\tp15, 0, %0, c13, c0, 4" : "=r"(l)); 268 return l; 269 } 270 271 static inline void 272 _curlwp_set(struct lwp *l) 273 { 274 __asm("mcr\tp15, 0, %0, c13, c0, 4" : "=r"(l)); 275 } 276 277 #define curlwp (_curlwp()) 278 static inline struct cpu_info * 279 curcpu(void) 280 { 281 return curlwp->l_cpu; 282 } 283 #elif defined(PROCESS_ID_IS_CURCPU) 284 static inline struct cpu_info * 285 curcpu(void) 286 { 287 struct cpu_info *ci; 288 __asm("mrc\tp15, 0, %0, c13, c0, 4" : "=r"(ci)); 289 return ci; 290 } 291 #else 292 #define curcpu() (&cpu_info_store) 293 #endif /* !PROCESS_ID_IS_CURCPU && !PROCESS_ID_IS_CURLWP */ 294 #ifndef curpcb 295 #define curpcb (curcpu()->ci_curpcb) 296 #endif 297 #ifndef curlwp 298 #define curlwp (curcpu()->ci_curlwp) 299 #endif 300 #define cpu_number() 0 301 #define LWP0_CPU_INFO (&cpu_info_store) 302 #endif /* !MULTIPROCESSOR */ 303 304 static inline int 305 curcpl(void) 306 { 307 return curcpu()->ci_cpl; 308 } 309 310 static inline void 311 set_curcpl(int pri) 312 { 313 curcpu()->ci_cpl = pri; 314 } 315 316 #ifdef __HAVE_FAST_SOFTINTS 317 void dosoftints(void); 318 static inline void 319 cpu_dosoftints(void) 320 { 321 struct cpu_info * const ci = curcpu(); 322 if (ci->ci_intr_depth == 0 && (ci->ci_softints >> ci->ci_cpl) > 0) 323 dosoftints(); 324 } 325 #endif 326 327 #ifdef __PROG32 328 void cpu_proc_fork(struct proc *, struct proc *); 329 #else 330 #define cpu_proc_fork(p1, p2) 331 #endif 332 333 /* 334 * Scheduling glue 335 */ 336 337 #define setsoftast() (curcpu()->ci_astpending = 1) 338 339 /* 340 * Notify the current process (p) that it has a signal pending, 341 * process as soon as possible. 342 */ 343 344 #define cpu_signotify(l) setsoftast() 345 346 /* 347 * Give a profiling tick to the current process when the user profiling 348 * buffer pages are invalid. On the i386, request an ast to send us 349 * through trap(), marking the proc as needing a profiling tick. 350 */ 351 #define cpu_need_proftick(l) ((l)->l_pflag |= LP_OWEUPC, setsoftast()) 352 353 #ifndef acorn26 354 /* 355 * cpu device glue (belongs in cpuvar.h) 356 */ 357 358 struct device; 359 void cpu_attach(struct device *); 360 #endif 361 362 /* 363 * Random cruft 364 */ 365 366 struct lwp; 367 368 /* locore.S */ 369 void atomic_set_bit(u_int *, u_int); 370 void atomic_clear_bit(u_int *, u_int); 371 372 /* cpuswitch.S */ 373 struct pcb; 374 void savectx(struct pcb *); 375 376 /* ast.c */ 377 void userret(register struct lwp *); 378 379 /* machdep.h */ 380 void bootsync(void); 381 382 /* fault.c */ 383 int badaddr_read(void *, size_t, void *); 384 385 /* syscall.c */ 386 void swi_handler(trapframe_t *); 387 388 #endif /* !_LOCORE */ 389 390 #endif /* _KERNEL */ 391 392 #endif /* !_ARM_CPU_H_ */ 393