xref: /netbsd-src/sys/arch/arm/include/cpu.h (revision 3b01aba77a7a698587faaae455bbfe740923c1f5)
1 /*	$NetBSD: cpu.h,v 1.15 2001/07/10 20:43:57 bjh21 Exp $	*/
2 
3 /*
4  * Copyright (c) 1994-1996 Mark Brinicombe.
5  * Copyright (c) 1994 Brini.
6  * All rights reserved.
7  *
8  * This code is derived from software written for Brini by Mark Brinicombe
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by Brini.
21  * 4. The name of the company nor the name of the author may be used to
22  *    endorse or promote products derived from this software without specific
23  *    prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35  * SUCH DAMAGE.
36  *
37  * RiscBSD kernel project
38  *
39  * cpu.h
40  *
41  * CPU specific symbols
42  *
43  * Created      : 18/09/94
44  *
45  * Based on kate/katelib/arm6.h
46  */
47 
48 #ifndef _ARM_CPU_H_
49 #define _ARM_CPU_H_
50 
51 /*
52  * User-visible definitions
53  */
54 
55 /*  CTL_MACHDEP definitions. */
56 #define	CPU_DEBUG		1	/* int: misc kernel debug control */
57 #define	CPU_BOOTED_DEVICE	2	/* string: device we booted from */
58 #define	CPU_BOOTED_KERNEL	3	/* string: kernel we booted */
59 #define	CPU_CONSDEV		4	/* struct: dev_t of our console */
60 #define	CPU_MAXID		5	/* number of valid machdep ids */
61 
62 #define	CTL_MACHDEP_NAMES { \
63 	{ 0, 0 }, \
64 	{ "debug", CTLTYPE_INT }, \
65 	{ "booted_device", CTLTYPE_STRING }, \
66 	{ "booted_kernel", CTLTYPE_STRING }, \
67 	{ "console_device", CTLTYPE_STRUCT }, \
68 }
69 
70 #ifdef _KERNEL
71 
72 /*
73  * Kernel-only definitions
74  */
75 
76 #ifndef _LKM
77 #include "opt_cputypes.h"
78 #include "opt_lockdebug.h"
79 #include "opt_progmode.h"
80 
81 #if defined(PROG26) && defined(PROG32)
82 #error "26-bit and 32-bit CPU support are not compatible"
83 #endif
84 #if !defined(PROG26) && !defined(PROG32)
85 #error "Support for at least one CPU type must be configured into the kernel"
86 #endif
87 
88 #endif /* !_LKM */
89 
90 
91 #include <machine/intr.h>
92 #ifndef _LOCORE
93 #include <sys/user.h>
94 #include <machine/frame.h>
95 #include <machine/pcb.h>
96 #endif	/* !_LOCORE */
97 
98 #include <arm/armreg.h>
99 
100 #ifdef PROG32
101 #ifdef _LOCORE
102 #define IRQdisable \
103 	stmfd	sp!, {r0} ; \
104 	mrs	r0, cpsr_all ; \
105 	orr	r0, r0, #(I32_bit) ; \
106 	msr	cpsr_all, r0 ; \
107 	ldmfd	sp!, {r0}
108 
109 #define IRQenable \
110 	stmfd	sp!, {r0} ; \
111 	mrs	r0, cpsr_all ; \
112 	bic	r0, r0, #(I32_bit) ; \
113 	msr	cpsr_all, r0 ; \
114 	ldmfd	sp!, {r0}
115 
116 #else
117 #define IRQdisable SetCPSR(I32_bit, I32_bit);
118 #define IRQenable SetCPSR(I32_bit, 0);
119 #endif	/* _LOCORE */
120 #endif
121 
122 #ifndef _LOCORE
123 
124 /* All the CLKF_* macros take a struct clockframe * as an argument. */
125 
126 /*
127  * CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the
128  * frame came from USR mode or not.
129  */
130 #ifdef PROG32
131 #define CLKF_USERMODE(frame)	((frame->if_spsr & PSR_MODE) == PSR_USR32_MODE)
132 #else
133 #define CLKF_USERMODE(frame)	((frame->if_r15 & R15_MODE) == R15_MODE_USR)
134 #endif
135 
136 /*
137  * CLKF_BASEPRI: True if we were at spl0 before the interrupt
138  *
139  * This needs straighening, prob is the frame does not have info on the
140  * priority a guess that needs trying is (current_spl_level == SPL0)
141  */
142 #define CLKF_BASEPRI(frame)	CLKF_USERMODE(frame)
143 
144 /*
145  * CLKF_INTR: True if we took the interrupt from inside another
146  * interrupt handler.
147  */
148 extern int current_intr_depth;
149 #ifdef PROG32
150 /* Hack to treat FPE time as interrupt time so we can measure it */
151 #define CLKF_INTR(frame)						\
152 	((current_intr_depth > 1) ||					\
153 	    (frame->if_spsr & PSR_MODE) == PSR_UND32_MODE)
154 #else
155 #define CLKF_INTR(frame)	(current_intr_depth > 1)
156 #endif
157 
158 /*
159  * CLKF_PC: Extract the program counter from a clockframe
160  */
161 #ifdef PROG32
162 #define CLKF_PC(frame)		(frame->if_pc)
163 #else
164 #define CLKF_PC(frame)		(frame->if_r15 & R15_PC)
165 #endif
166 
167 /*
168  * PROC_PC: Find out the program counter for the given process.
169  */
170 #ifdef PROG32
171 #define PROC_PC(p)	((p)->p_addr->u_pcb.pcb_tf->tf_pc)
172 #else
173 #define PROC_PC(p)	((p)->p_addr->u_pcb.pcb_tf->tf_r15 & R15_PC)
174 #endif
175 
176 
177 /*
178  * Per-CPU information.  For now we assume one CPU.
179  */
180 
181 #include <sys/sched.h>
182 struct cpu_info {
183 	struct schedstate_percpu ci_schedstate; /* scheduler state */
184 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
185 	u_long ci_spin_locks;		/* # of spin locks held */
186 	u_long ci_simple_locks;		/* # of simple locks held */
187 #endif
188 };
189 
190 extern struct cpu_info cpu_info_store;
191 #define	curcpu()	(&cpu_info_store)
192 #define cpu_number()	0
193 
194 
195 /*
196  * Scheduling glue
197  */
198 
199 extern int astpending;
200 #define setsoftast() (astpending = 1)
201 
202 /*
203  * Notify the current process (p) that it has a signal pending,
204  * process as soon as possible.
205  */
206 
207 #define signotify(p)            setsoftast()
208 
209 #define cpu_wait(p)	/* nothing */
210 
211 /*
212  * Preempt the current process if in interrupt from user mode,
213  * or after the current trap/syscall if in system mode.
214  */
215 int	want_resched;		/* resched() was called */
216 #define	need_resched(ci)	(want_resched = 1, setsoftast())
217 
218 /*
219  * Give a profiling tick to the current process when the user profiling
220  * buffer pages are invalid.  On the i386, request an ast to send us
221  * through trap(), marking the proc as needing a profiling tick.
222  */
223 #define	need_proftick(p)	((p)->p_flag |= P_OWEUPC, setsoftast())
224 
225 #ifndef arm26
226 /*
227  * cpu device glue (belongs in cpuvar.h)
228  */
229 
230 struct device;
231 void	cpu_attach	__P((struct device *));
232 #endif
233 
234 
235 /*
236  * Random cruft
237  */
238 
239 /* locore.S */
240 void atomic_set_bit	__P((u_int *address, u_int setmask));
241 void atomic_clear_bit	__P((u_int *address, u_int clearmask));
242 
243 /* cpuswitch.S */
244 struct pcb;
245 void	savectx		__P((struct pcb *pcb));
246 
247 #ifndef arm26
248 /* ast.c */
249 void userret		__P((register struct proc *p));
250 #endif
251 
252 /* machdep.h */
253 void bootsync		__P((void));
254 
255 #endif	/* !_LOCORE */
256 
257 #endif /* _KERNEL */
258 
259 #endif /* !_ARM_CPU_H_ */
260 
261 /* End of cpu.h */
262