xref: /netbsd-src/sys/arch/arm/include/cpu.h (revision 267197ec1eebfcb9810ea27a89625b6ddf68e3e7)
1 /*	$NetBSD: cpu.h,v 1.49 2008/01/06 03:11:42 matt Exp $	*/
2 
3 /*
4  * Copyright (c) 1994-1996 Mark Brinicombe.
5  * Copyright (c) 1994 Brini.
6  * All rights reserved.
7  *
8  * This code is derived from software written for Brini by Mark Brinicombe
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by Brini.
21  * 4. The name of the company nor the name of the author may be used to
22  *    endorse or promote products derived from this software without specific
23  *    prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35  * SUCH DAMAGE.
36  *
37  * RiscBSD kernel project
38  *
39  * cpu.h
40  *
41  * CPU specific symbols
42  *
43  * Created      : 18/09/94
44  *
45  * Based on kate/katelib/arm6.h
46  */
47 
48 #ifndef _ARM_CPU_H_
49 #define _ARM_CPU_H_
50 
51 /*
52  * User-visible definitions
53  */
54 
55 /*  CTL_MACHDEP definitions. */
56 #define	CPU_DEBUG		1	/* int: misc kernel debug control */
57 #define	CPU_BOOTED_DEVICE	2	/* string: device we booted from */
58 #define	CPU_BOOTED_KERNEL	3	/* string: kernel we booted */
59 #define	CPU_CONSDEV		4	/* struct: dev_t of our console */
60 #define	CPU_POWERSAVE		5	/* int: use CPU powersave mode */
61 #define	CPU_MAXID		6	/* number of valid machdep ids */
62 
63 #define	CTL_MACHDEP_NAMES { \
64 	{ 0, 0 }, \
65 	{ "debug", CTLTYPE_INT }, \
66 	{ "booted_device", CTLTYPE_STRING }, \
67 	{ "booted_kernel", CTLTYPE_STRING }, \
68 	{ "console_device", CTLTYPE_STRUCT }, \
69 	{ "powersave", CTLTYPE_INT }, \
70 }
71 
72 #ifdef _KERNEL
73 
74 /*
75  * Kernel-only definitions
76  */
77 
78 #ifndef _LKM
79 #include "opt_multiprocessor.h"
80 #include "opt_lockdebug.h"
81 #endif /* !_LKM */
82 
83 #include <arm/cpuconf.h>
84 
85 #include <machine/intr.h>
86 #ifndef _LOCORE
87 #include <sys/user.h>
88 #include <machine/frame.h>
89 #include <machine/pcb.h>
90 #endif	/* !_LOCORE */
91 
92 #include <arm/armreg.h>
93 
94 #ifndef _LOCORE
95 /* 1 == use cpu_sleep(), 0 == don't */
96 extern int cpu_do_powersave;
97 #endif
98 
99 #ifdef __PROG32
100 #ifdef _LOCORE
101 #define IRQdisable \
102 	stmfd	sp!, {r0} ; \
103 	mrs	r0, cpsr ; \
104 	orr	r0, r0, #(I32_bit) ; \
105 	msr	cpsr_c, r0 ; \
106 	ldmfd	sp!, {r0}
107 
108 #define IRQenable \
109 	stmfd	sp!, {r0} ; \
110 	mrs	r0, cpsr ; \
111 	bic	r0, r0, #(I32_bit) ; \
112 	msr	cpsr_c, r0 ; \
113 	ldmfd	sp!, {r0}
114 
115 #else
116 #define IRQdisable __set_cpsr_c(I32_bit, I32_bit);
117 #define IRQenable __set_cpsr_c(I32_bit, 0);
118 #endif	/* _LOCORE */
119 #else
120 #define IRQdisable set_r15(R15_IRQ_DISABLE, R15_IRQ_DISABLE);
121 #define IRQenable set_r15(R15_IRQ_DISABLE, 0);
122 #endif
123 
124 #ifndef _LOCORE
125 
126 /* All the CLKF_* macros take a struct clockframe * as an argument. */
127 
128 /*
129  * CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the
130  * frame came from USR mode or not.
131  */
132 #ifdef __PROG32
133 #define CLKF_USERMODE(frame)	((frame->cf_if.if_spsr & PSR_MODE) == PSR_USR32_MODE)
134 #else
135 #define CLKF_USERMODE(frame)	((frame->cf_if.if_r15 & R15_MODE) == R15_MODE_USR)
136 #endif
137 
138 /*
139  * CLKF_INTR: True if we took the interrupt from inside another
140  * interrupt handler.
141  */
142 #ifdef __PROG32
143 /* Hack to treat FPE time as interrupt time so we can measure it */
144 #define CLKF_INTR(frame)						\
145 	((curcpu()->ci_idepth > 1) ||					\
146 	    (frame->cf_if.if_spsr & PSR_MODE) == PSR_UND32_MODE)
147 #else
148 #define CLKF_INTR(frame)	(curcpu()->ci_idepth > 1)
149 #endif
150 
151 /*
152  * CLKF_PC: Extract the program counter from a clockframe
153  */
154 #ifdef __PROG32
155 #define CLKF_PC(frame)		(frame->cf_if.if_pc)
156 #else
157 #define CLKF_PC(frame)		(frame->cf_if.if_r15 & R15_PC)
158 #endif
159 
160 /*
161  * LWP_PC: Find out the program counter for the given lwp.
162  */
163 #ifdef __PROG32
164 #define LWP_PC(l)	((l)->l_addr->u_pcb.pcb_tf->tf_pc)
165 #else
166 #define LWP_PC(l)	((l)->l_addr->u_pcb.pcb_tf->tf_r15 & R15_PC)
167 #endif
168 
169 /*
170  * Validate a PC or PSR for a user process.  Used by various system calls
171  * that take a context passed by the user and restore it.
172  */
173 
174 #ifdef __PROG32
175 #define VALID_R15_PSR(r15,psr)						\
176 	(((psr) & PSR_MODE) == PSR_USR32_MODE &&			\
177 		((psr) & (I32_bit | F32_bit)) == 0)
178 #else
179 #define VALID_R15_PSR(r15,psr)						\
180 	(((r15) & R15_MODE) == R15_MODE_USR &&				\
181 		((r15) & (R15_IRQ_DISABLE | R15_FIQ_DISABLE)) == 0)
182 #endif
183 
184 
185 
186 /* The address of the vector page. */
187 extern vaddr_t vector_page;
188 #ifdef __PROG32
189 void	arm32_vector_init(vaddr_t, int);
190 
191 #define	ARM_VEC_RESET			(1 << 0)
192 #define	ARM_VEC_UNDEFINED		(1 << 1)
193 #define	ARM_VEC_SWI			(1 << 2)
194 #define	ARM_VEC_PREFETCH_ABORT		(1 << 3)
195 #define	ARM_VEC_DATA_ABORT		(1 << 4)
196 #define	ARM_VEC_ADDRESS_EXCEPTION	(1 << 5)
197 #define	ARM_VEC_IRQ			(1 << 6)
198 #define	ARM_VEC_FIQ			(1 << 7)
199 
200 #define	ARM_NVEC			8
201 #define	ARM_VEC_ALL			0xffffffff
202 #endif
203 
204 /*
205  * Per-CPU information.  For now we assume one CPU.
206  */
207 
208 #include <sys/device.h>
209 #include <sys/cpu_data.h>
210 struct cpu_info {
211 	struct cpu_data ci_data;	/* MI per-cpu data */
212 	struct device *ci_dev;		/* Device corresponding to this CPU */
213 	cpuid_t ci_cpuid;
214 	u_int32_t ci_arm_cpuid;		/* aggregate CPU id */
215 	u_int32_t ci_arm_cputype;	/* CPU type */
216 	u_int32_t ci_arm_cpurev;	/* CPU revision */
217 	u_int32_t ci_ctrl;		/* The CPU control register */
218 	struct evcnt ci_arm700bugcount;
219 	int32_t ci_mtx_count;
220 	int ci_mtx_oldspl;
221 	int ci_want_resched;
222 	int ci_idepth;
223 #ifdef MULTIPROCESSOR
224 	MP_CPU_INFO_MEMBERS
225 #endif
226 };
227 
228 #ifndef MULTIPROCESSOR
229 extern struct cpu_info cpu_info_store;
230 #define	curcpu()	(&cpu_info_store)
231 #define cpu_number()	0
232 #endif
233 
234 #ifdef __PROG32
235 void	cpu_proc_fork(struct proc *, struct proc *);
236 #else
237 #define	cpu_proc_fork(p1, p2)
238 #endif
239 
240 /*
241  * Scheduling glue
242  */
243 
244 extern int astpending;
245 #define setsoftast() (astpending = 1)
246 
247 /*
248  * Notify the current process (p) that it has a signal pending,
249  * process as soon as possible.
250  */
251 
252 #define cpu_signotify(l)            setsoftast()
253 
254 /*
255  * Give a profiling tick to the current process when the user profiling
256  * buffer pages are invalid.  On the i386, request an ast to send us
257  * through trap(), marking the proc as needing a profiling tick.
258  */
259 #define	cpu_need_proftick(l)	((l)->l_pflag |= LP_OWEUPC, setsoftast())
260 
261 #ifndef acorn26
262 /*
263  * cpu device glue (belongs in cpuvar.h)
264  */
265 
266 struct device;
267 void	cpu_attach(struct device *);
268 #endif
269 
270 /*
271  * Random cruft
272  */
273 
274 struct lwp;
275 
276 /* locore.S */
277 void atomic_set_bit(u_int *, u_int);
278 void atomic_clear_bit(u_int *, u_int);
279 
280 /* cpuswitch.S */
281 struct pcb;
282 void	savectx(struct pcb *);
283 
284 /* ast.c */
285 void userret(register struct lwp *);
286 
287 /* machdep.h */
288 void bootsync(void);
289 
290 /* fault.c */
291 int badaddr_read(void *, size_t, void *);
292 
293 /* syscall.c */
294 void swi_handler(trapframe_t *);
295 
296 #endif	/* !_LOCORE */
297 
298 #endif /* _KERNEL */
299 
300 #endif /* !_ARM_CPU_H_ */
301 
302 /* End of cpu.h */
303