xref: /netbsd-src/sys/arch/arm/include/cpu.h (revision 23c8222edbfb0f0932d88a8351d3a0cf817dfb9e)
1 /*	$NetBSD: cpu.h,v 1.36 2004/09/22 11:32:02 yamt Exp $	*/
2 
3 /*
4  * Copyright (c) 1994-1996 Mark Brinicombe.
5  * Copyright (c) 1994 Brini.
6  * All rights reserved.
7  *
8  * This code is derived from software written for Brini by Mark Brinicombe
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by Brini.
21  * 4. The name of the company nor the name of the author may be used to
22  *    endorse or promote products derived from this software without specific
23  *    prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35  * SUCH DAMAGE.
36  *
37  * RiscBSD kernel project
38  *
39  * cpu.h
40  *
41  * CPU specific symbols
42  *
43  * Created      : 18/09/94
44  *
45  * Based on kate/katelib/arm6.h
46  */
47 
48 #ifndef _ARM_CPU_H_
49 #define _ARM_CPU_H_
50 
51 /*
52  * User-visible definitions
53  */
54 
55 /*  CTL_MACHDEP definitions. */
56 #define	CPU_DEBUG		1	/* int: misc kernel debug control */
57 #define	CPU_BOOTED_DEVICE	2	/* string: device we booted from */
58 #define	CPU_BOOTED_KERNEL	3	/* string: kernel we booted */
59 #define	CPU_CONSDEV		4	/* struct: dev_t of our console */
60 #define	CPU_POWERSAVE		5	/* int: use CPU powersave mode */
61 #define	CPU_MAXID		6	/* number of valid machdep ids */
62 
63 #define	CTL_MACHDEP_NAMES { \
64 	{ 0, 0 }, \
65 	{ "debug", CTLTYPE_INT }, \
66 	{ "booted_device", CTLTYPE_STRING }, \
67 	{ "booted_kernel", CTLTYPE_STRING }, \
68 	{ "console_device", CTLTYPE_STRUCT }, \
69 	{ "powersave", CTLTYPE_INT }, \
70 }
71 
72 #ifdef _KERNEL
73 
74 /*
75  * Kernel-only definitions
76  */
77 
78 #ifndef _LKM
79 #include "opt_multiprocessor.h"
80 #include "opt_lockdebug.h"
81 #endif /* !_LKM */
82 
83 #include <arm/cpuconf.h>
84 
85 #include <machine/intr.h>
86 #ifndef _LOCORE
87 #include <sys/user.h>
88 #include <machine/frame.h>
89 #include <machine/pcb.h>
90 #endif	/* !_LOCORE */
91 
92 #include <arm/armreg.h>
93 
94 #ifndef _LOCORE
95 /* 1 == use cpu_sleep(), 0 == don't */
96 extern int cpu_do_powersave;
97 #endif
98 
99 #ifdef __PROG32
100 #ifdef _LOCORE
101 #define IRQdisable \
102 	stmfd	sp!, {r0} ; \
103 	mrs	r0, cpsr ; \
104 	orr	r0, r0, #(I32_bit) ; \
105 	msr	cpsr_c, r0 ; \
106 	ldmfd	sp!, {r0}
107 
108 #define IRQenable \
109 	stmfd	sp!, {r0} ; \
110 	mrs	r0, cpsr ; \
111 	bic	r0, r0, #(I32_bit) ; \
112 	msr	cpsr_c, r0 ; \
113 	ldmfd	sp!, {r0}
114 
115 #else
116 #define IRQdisable __set_cpsr_c(I32_bit, I32_bit);
117 #define IRQenable __set_cpsr_c(I32_bit, 0);
118 #endif	/* _LOCORE */
119 #endif
120 
121 #ifndef _LOCORE
122 
123 /* All the CLKF_* macros take a struct clockframe * as an argument. */
124 
125 /*
126  * CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the
127  * frame came from USR mode or not.
128  */
129 #ifdef __PROG32
130 #define CLKF_USERMODE(frame)	((frame->if_spsr & PSR_MODE) == PSR_USR32_MODE)
131 #else
132 #define CLKF_USERMODE(frame)	((frame->if_r15 & R15_MODE) == R15_MODE_USR)
133 #endif
134 
135 /*
136  * CLKF_BASEPRI: True if we were at spl0 before the interrupt.
137  *
138  * This is hard-wired to 0 on the ARM, since spllowersoftclock() might
139  * not actually be able to unblock the interrupt, which would cause us
140  * to run the softclock interrupts with hardclock blocked.
141  */
142 #define CLKF_BASEPRI(frame)	0
143 
144 /*
145  * CLKF_INTR: True if we took the interrupt from inside another
146  * interrupt handler.
147  */
148 extern int current_intr_depth;
149 #ifdef __PROG32
150 /* Hack to treat FPE time as interrupt time so we can measure it */
151 #define CLKF_INTR(frame)						\
152 	((current_intr_depth > 1) ||					\
153 	    (frame->if_spsr & PSR_MODE) == PSR_UND32_MODE)
154 #else
155 #define CLKF_INTR(frame)	(current_intr_depth > 1)
156 #endif
157 
158 /*
159  * CLKF_PC: Extract the program counter from a clockframe
160  */
161 #ifdef __PROG32
162 #define CLKF_PC(frame)		(frame->if_pc)
163 #else
164 #define CLKF_PC(frame)		(frame->if_r15 & R15_PC)
165 #endif
166 
167 /*
168  * LWP_PC: Find out the program counter for the given lwp.
169  */
170 #ifdef __PROG32
171 #define LWP_PC(l)	((l)->l_addr->u_pcb.pcb_tf->tf_pc)
172 #else
173 #define LWP_PC(l)	((l)->l_addr->u_pcb.pcb_tf->tf_r15 & R15_PC)
174 #endif
175 
176 /* The address of the vector page. */
177 extern vaddr_t vector_page;
178 #ifdef __PROG32
179 void	arm32_vector_init(vaddr_t, int);
180 
181 #define	ARM_VEC_RESET			(1 << 0)
182 #define	ARM_VEC_UNDEFINED		(1 << 1)
183 #define	ARM_VEC_SWI			(1 << 2)
184 #define	ARM_VEC_PREFETCH_ABORT		(1 << 3)
185 #define	ARM_VEC_DATA_ABORT		(1 << 4)
186 #define	ARM_VEC_ADDRESS_EXCEPTION	(1 << 5)
187 #define	ARM_VEC_IRQ			(1 << 6)
188 #define	ARM_VEC_FIQ			(1 << 7)
189 
190 #define	ARM_NVEC			8
191 #define	ARM_VEC_ALL			0xffffffff
192 #endif
193 
194 /*
195  * Per-CPU information.  For now we assume one CPU.
196  */
197 
198 #include <sys/device.h>
199 #include <sys/cpu_data.h>
200 struct cpu_info {
201 	struct cpu_data ci_data;	/* MI per-cpu data */
202 	struct device *ci_dev;		/* Device corresponding to this CPU */
203 	u_int32_t ci_arm_cpuid;		/* aggregate CPU id */
204 	u_int32_t ci_arm_cputype;	/* CPU type */
205 	u_int32_t ci_arm_cpurev;	/* CPU revision */
206 	u_int32_t ci_ctrl;		/* The CPU control register */
207 	struct evcnt ci_arm700bugcount;
208 #ifdef MULTIPROCESSOR
209 	MP_CPU_INFO_MEMBERS
210 #endif
211 };
212 
213 #ifndef MULTIPROCESSOR
214 extern struct cpu_info cpu_info_store;
215 #define	curcpu()	(&cpu_info_store)
216 #define cpu_number()	0
217 #endif
218 
219 #ifdef __PROG32
220 void	cpu_proc_fork(struct proc *, struct proc *);
221 #else
222 #define	cpu_proc_fork(p1, p2)
223 #endif
224 
225 /*
226  * Scheduling glue
227  */
228 
229 extern int astpending;
230 #define setsoftast() (astpending = 1)
231 
232 /*
233  * Notify the current process (p) that it has a signal pending,
234  * process as soon as possible.
235  */
236 
237 #define signotify(p)            setsoftast()
238 
239 /*
240  * Preempt the current process if in interrupt from user mode,
241  * or after the current trap/syscall if in system mode.
242  */
243 int	want_resched;		/* resched() was called */
244 #define	need_resched(ci)	(want_resched = 1, setsoftast())
245 
246 /*
247  * Give a profiling tick to the current process when the user profiling
248  * buffer pages are invalid.  On the i386, request an ast to send us
249  * through trap(), marking the proc as needing a profiling tick.
250  */
251 #define	need_proftick(p)	((p)->p_flag |= P_OWEUPC, setsoftast())
252 
253 #ifndef acorn26
254 /*
255  * cpu device glue (belongs in cpuvar.h)
256  */
257 
258 struct device;
259 void	cpu_attach	__P((struct device *));
260 int	cpu_alloc_idlepcb	__P((struct cpu_info *));
261 #endif
262 
263 
264 /*
265  * Random cruft
266  */
267 
268 struct lwp;
269 
270 /* locore.S */
271 void atomic_set_bit	__P((u_int *address, u_int setmask));
272 void atomic_clear_bit	__P((u_int *address, u_int clearmask));
273 
274 /* cpuswitch.S */
275 struct pcb;
276 void	savectx		__P((struct pcb *pcb));
277 
278 /* ast.c */
279 void userret		__P((register struct lwp *p));
280 
281 /* machdep.h */
282 void bootsync		__P((void));
283 
284 /* fault.c */
285 int badaddr_read	__P((void *, size_t, void *));
286 
287 /* syscall.c */
288 void swi_handler	__P((trapframe_t *));
289 
290 #endif	/* !_LOCORE */
291 
292 #endif /* _KERNEL */
293 
294 #endif /* !_ARM_CPU_H_ */
295 
296 /* End of cpu.h */
297