xref: /netbsd-src/sys/arch/arm/include/cpu.h (revision 181254a7b1bdde6873432bffef2d2decc4b5c22f)
1 /*	$NetBSD: cpu.h,v 1.114 2020/08/17 01:52:59 mrg Exp $	*/
2 
3 /*
4  * Copyright (c) 1994-1996 Mark Brinicombe.
5  * Copyright (c) 1994 Brini.
6  * All rights reserved.
7  *
8  * This code is derived from software written for Brini by Mark Brinicombe
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by Brini.
21  * 4. The name of the company nor the name of the author may be used to
22  *    endorse or promote products derived from this software without specific
23  *    prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35  * SUCH DAMAGE.
36  *
37  * RiscBSD kernel project
38  *
39  * cpu.h
40  *
41  * CPU specific symbols
42  *
43  * Created      : 18/09/94
44  *
45  * Based on kate/katelib/arm6.h
46  */
47 
48 #ifndef _ARM_CPU_H_
49 #define _ARM_CPU_H_
50 
51 #ifdef _KERNEL
52 #ifndef _LOCORE
53 
54 typedef unsigned long mpidr_t;
55 
56 #ifdef MULTIPROCESSOR
57 extern u_int arm_cpu_max;
58 extern mpidr_t cpu_mpidr[];
59 extern kmutex_t cpu_hatch_lock;
60 
61 void cpu_boot_secondary_processors(void);
62 void cpu_mpstart(void);
63 bool cpu_hatched_p(u_int);
64 
65 void cpu_clr_mbox(int);
66 void cpu_set_hatched(int);
67 
68 #endif
69 
70 void	cpu_proc_fork(struct proc *, struct proc *);
71 
72 #endif	/* !_LOCORE */
73 #endif	/* _KERNEL */
74 
75 #ifdef __arm__
76 
77 /*
78  * User-visible definitions
79  */
80 
81 /*  CTL_MACHDEP definitions. */
82 #define	CPU_DEBUG		1	/* int: misc kernel debug control */
83 #define	CPU_BOOTED_DEVICE	2	/* string: device we booted from */
84 #define	CPU_BOOTED_KERNEL	3	/* string: kernel we booted */
85 #define	CPU_CONSDEV		4	/* struct: dev_t of our console */
86 #define	CPU_POWERSAVE		5	/* int: use CPU powersave mode */
87 
88 #if defined(_KERNEL) || defined(_KMEMUSER)
89 
90 /*
91  * Kernel-only definitions
92  */
93 
94 #if !defined(_MODULE) && defined(_KERNEL_OPT)
95 #include "opt_multiprocessor.h"
96 #include "opt_cpuoptions.h"
97 #include "opt_lockdebug.h"
98 #include "opt_cputypes.h"
99 #endif /* !_MODULE && _KERNEL_OPT */
100 
101 #ifndef _LOCORE
102 #if defined(TPIDRPRW_IS_CURLWP) || defined(TPIDRPRW_IS_CURCPU)
103 #include <arm/armreg.h>
104 #endif /* TPIDRPRW_IS_CURLWP || TPIDRPRW_IS_CURCPU */
105 
106 /* 1 == use cpu_sleep(), 0 == don't */
107 extern int cpu_do_powersave;
108 extern int cpu_fpu_present;
109 
110 /* All the CLKF_* macros take a struct clockframe * as an argument. */
111 
112 /*
113  * CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the
114  * frame came from USR mode or not.
115  */
116 #define CLKF_USERMODE(cf) (((cf)->cf_tf.tf_spsr & PSR_MODE) == PSR_USR32_MODE)
117 
118 /*
119  * CLKF_INTR: True if we took the interrupt from inside another
120  * interrupt handler.
121  */
122 #if !defined(__ARM_EABI__)
123 /* Hack to treat FPE time as interrupt time so we can measure it */
124 #define CLKF_INTR(cf)						\
125 	((curcpu()->ci_intr_depth > 1) ||			\
126 	    ((cf)->cf_tf.tf_spsr & PSR_MODE) == PSR_UND32_MODE)
127 #else
128 #define CLKF_INTR(cf)	((void)(cf), curcpu()->ci_intr_depth > 1)
129 #endif
130 
131 /*
132  * CLKF_PC: Extract the program counter from a clockframe
133  */
134 #define CLKF_PC(frame)		(frame->cf_tf.tf_pc)
135 
136 /*
137  * LWP_PC: Find out the program counter for the given lwp.
138  */
139 #define LWP_PC(l)		(lwp_trapframe(l)->tf_pc)
140 
141 /*
142  * Per-CPU information.  For now we assume one CPU.
143  */
144 #ifdef _KERNEL
145 static inline int curcpl(void);
146 static inline void set_curcpl(int);
147 static inline void cpu_dosoftints(void);
148 #endif
149 
150 #ifdef _KMEMUSER
151 #include <sys/intr.h>
152 #endif
153 #include <sys/atomic.h>
154 #include <sys/cpu_data.h>
155 #include <sys/device_if.h>
156 #include <sys/evcnt.h>
157 #include <machine/param.h>
158 
159 struct cpu_info {
160 	struct cpu_data	ci_data;	/* MI per-cpu data */
161 	device_t	ci_dev;		/* Device corresponding to this CPU */
162 	cpuid_t		ci_cpuid;
163 	uint32_t	ci_arm_cpuid;	/* aggregate CPU id */
164 	uint32_t	ci_arm_cputype;	/* CPU type */
165 	uint32_t	ci_arm_cpurev;	/* CPU revision */
166 	uint32_t	ci_ctrl;	/* The CPU control register */
167 
168 	/*
169 	 * the following are in their own cache line, as they are stored to
170 	 * regularly by remote CPUs; when they were mixed with other fields
171 	 * we observed frequent cache misses.
172 	 */
173 	int		ci_want_resched __aligned(COHERENCY_UNIT);
174 					/* resched() was called */
175 	lwp_t *		ci_curlwp __aligned(COHERENCY_UNIT);
176 					/* current lwp */
177 	lwp_t *		ci_onproc;	/* current user LWP / kthread */
178 
179 	/*
180 	 * largely CPU-private.
181 	 */
182 	lwp_t *		ci_softlwps[SOFTINT_COUNT] __aligned(COHERENCY_UNIT);
183 
184 	struct cpu_softc *
185 			ci_softc;	/* platform softc */
186 
187 	int		ci_cpl;		/* current processor level (spl) */
188 	int		ci_kfpu_spl;
189 
190 	volatile u_int	ci_intr_depth;	/* */
191 	volatile u_int	ci_softints;
192 
193 	lwp_t *		ci_lastlwp;	/* last lwp */
194 
195 	struct evcnt	ci_arm700bugcount;
196 	int32_t		ci_mtx_count;
197 	int		ci_mtx_oldspl;
198 	register_t	ci_undefsave[3];
199 	uint32_t	ci_vfp_id;
200 	uint64_t	ci_lastintr;
201 
202 	struct pmap_tlb_info *
203 			ci_tlb_info;
204 	struct pmap *	ci_pmap_lastuser;
205 	struct pmap *	ci_pmap_cur;
206 	tlb_asid_t	ci_pmap_asid_cur;
207 
208 	struct trapframe *
209 			ci_ddb_regs;
210 
211 	struct evcnt	ci_abt_evs[16];
212 	struct evcnt	ci_und_ev;
213 	struct evcnt	ci_und_cp15_ev;
214 	struct evcnt	ci_vfp_evs[3];
215 
216 	uint32_t	ci_midr;
217 	uint32_t	ci_mpidr;
218 	uint32_t	ci_capacity_dmips_mhz;
219 
220 	struct arm_cache_info *
221 			ci_cacheinfo;
222 };
223 
224 extern struct cpu_info cpu_info_store[];
225 
226 struct lwp *arm_curlwp(void);
227 struct cpu_info *arm_curcpu(void);
228 
229 #ifdef _KERNEL
230 #if defined(_MODULE)
231 
232 #define	curlwp		arm_curlwp()
233 #define curcpu()	arm_curcpu()
234 
235 #elif defined(TPIDRPRW_IS_CURLWP)
236 static inline struct lwp *
237 _curlwp(void)
238 {
239 	return (struct lwp *) armreg_tpidrprw_read();
240 }
241 
242 static inline void
243 _curlwp_set(struct lwp *l)
244 {
245 	armreg_tpidrprw_write((uintptr_t)l);
246 }
247 
248 // Also in <sys/lwp.h> but also here if this was included before <sys/lwp.h>
249 static inline struct cpu_info *lwp_getcpu(struct lwp *);
250 
251 #define	curlwp		_curlwp()
252 // curcpu() expands into two instructions: a mrc and a ldr
253 #define	curcpu()	lwp_getcpu(_curlwp())
254 #elif defined(TPIDRPRW_IS_CURCPU)
255 #ifdef __HAVE_PREEMPTION
256 #error __HAVE_PREEMPTION requires TPIDRPRW_IS_CURLWP
257 #endif
258 static inline struct cpu_info *
259 curcpu(void)
260 {
261 	return (struct cpu_info *) armreg_tpidrprw_read();
262 }
263 #elif !defined(MULTIPROCESSOR)
264 #define	curcpu()	(&cpu_info_store[0])
265 #elif !defined(__HAVE_PREEMPTION)
266 #error MULTIPROCESSOR && !__HAVE_PREEMPTION requires TPIDRPRW_IS_CURCPU or TPIDRPRW_IS_CURLWP
267 #else
268 #error MULTIPROCESSOR && __HAVE_PREEMPTION requires TPIDRPRW_IS_CURLWP
269 #endif /* !TPIDRPRW_IS_CURCPU && !TPIDRPRW_IS_CURLWP */
270 
271 #ifndef curlwp
272 #define	curlwp		(curcpu()->ci_curlwp)
273 #endif
274 #define curpcb		((struct pcb *)lwp_getpcb(curlwp))
275 
276 #define CPU_INFO_ITERATOR	int
277 #if defined(_MODULE) || defined(MULTIPROCESSOR)
278 extern struct cpu_info *cpu_info[];
279 #define cpu_number()		(curcpu()->ci_index)
280 #define CPU_IS_PRIMARY(ci)	((ci)->ci_index == 0)
281 #define CPU_INFO_FOREACH(cii, ci)			\
282 	cii = 0, ci = cpu_info[0]; cii < (ncpu ? ncpu : 1) && (ci = cpu_info[cii]) != NULL; cii++
283 #else
284 #define cpu_number()            0
285 
286 #define CPU_IS_PRIMARY(ci)	true
287 #define CPU_INFO_FOREACH(cii, ci)			\
288 	cii = 0, __USE(cii), ci = curcpu(); ci != NULL; ci = NULL
289 #endif
290 
291 #if defined(MULTIPROCESSOR)
292 void cpu_init_secondary_processor(int);
293 #endif
294 
295 #define	LWP0_CPU_INFO	(&cpu_info_store[0])
296 
297 static inline int
298 curcpl(void)
299 {
300 	return curcpu()->ci_cpl;
301 }
302 
303 static inline void
304 set_curcpl(int pri)
305 {
306 	curcpu()->ci_cpl = pri;
307 }
308 
309 static inline void
310 cpu_dosoftints(void)
311 {
312 #ifdef __HAVE_FAST_SOFTINTS
313 	void	dosoftints(void);
314 #ifndef __HAVE_PIC_FAST_SOFTINTS
315 	struct cpu_info * const ci = curcpu();
316 	if (ci->ci_intr_depth == 0 && (ci->ci_softints >> ci->ci_cpl) > 0)
317 		dosoftints();
318 #endif
319 #endif
320 }
321 
322 /*
323  * Scheduling glue
324  */
325 void cpu_signotify(struct lwp *);
326 #define	setsoftast(ci)		(cpu_signotify((ci)->ci_onproc))
327 
328 /*
329  * Give a profiling tick to the current process when the user profiling
330  * buffer pages are invalid.  On the i386, request an ast to send us
331  * through trap(), marking the proc as needing a profiling tick.
332  */
333 #define	cpu_need_proftick(l)	((l)->l_pflag |= LP_OWEUPC, \
334 				 setsoftast(lwp_getcpu(l)))
335 
336 /*
337  * We've already preallocated the stack for the idlelwps for additional CPUs.
338  * This hook allows to return them.
339  */
340 vaddr_t cpu_uarea_alloc_idlelwp(struct cpu_info *);
341 
342 #ifdef _ARM_ARCH_6
343 int	cpu_maxproc_hook(int);
344 #endif
345 
346 #endif /* _KERNEL */
347 
348 #endif /* !_LOCORE */
349 
350 #endif /* _KERNEL || _KMEMUSER */
351 
352 #elif defined(__aarch64__)
353 
354 #include <aarch64/cpu.h>
355 
356 #endif /* __arm__/__aarch64__ */
357 
358 #endif /* !_ARM_CPU_H_ */
359