xref: /netbsd-src/sys/arch/arm/include/cpu.h (revision 08c81a9c2dc8c7300e893321eb65c0925d60871c)
1 /*	$NetBSD: cpu.h,v 1.29 2002/08/16 15:25:54 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c) 1994-1996 Mark Brinicombe.
5  * Copyright (c) 1994 Brini.
6  * All rights reserved.
7  *
8  * This code is derived from software written for Brini by Mark Brinicombe
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by Brini.
21  * 4. The name of the company nor the name of the author may be used to
22  *    endorse or promote products derived from this software without specific
23  *    prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35  * SUCH DAMAGE.
36  *
37  * RiscBSD kernel project
38  *
39  * cpu.h
40  *
41  * CPU specific symbols
42  *
43  * Created      : 18/09/94
44  *
45  * Based on kate/katelib/arm6.h
46  */
47 
48 #ifndef _ARM_CPU_H_
49 #define _ARM_CPU_H_
50 
51 /*
52  * User-visible definitions
53  */
54 
55 /*  CTL_MACHDEP definitions. */
56 #define	CPU_DEBUG		1	/* int: misc kernel debug control */
57 #define	CPU_BOOTED_DEVICE	2	/* string: device we booted from */
58 #define	CPU_BOOTED_KERNEL	3	/* string: kernel we booted */
59 #define	CPU_CONSDEV		4	/* struct: dev_t of our console */
60 #define	CPU_POWERSAVE		5	/* int: use CPU powersave mode */
61 #define	CPU_MAXID		6	/* number of valid machdep ids */
62 
63 #define	CTL_MACHDEP_NAMES { \
64 	{ 0, 0 }, \
65 	{ "debug", CTLTYPE_INT }, \
66 	{ "booted_device", CTLTYPE_STRING }, \
67 	{ "booted_kernel", CTLTYPE_STRING }, \
68 	{ "console_device", CTLTYPE_STRUCT }, \
69 	{ "powersave", CTLTYPE_INT }, \
70 }
71 
72 #ifdef _KERNEL
73 
74 /*
75  * Kernel-only definitions
76  */
77 
78 #ifndef _LKM
79 #include "opt_lockdebug.h"
80 #endif /* !_LKM */
81 
82 #include <arm/cpuconf.h>
83 
84 #include <machine/intr.h>
85 #ifndef _LOCORE
86 #include <sys/user.h>
87 #include <machine/frame.h>
88 #include <machine/pcb.h>
89 #endif	/* !_LOCORE */
90 
91 #include <arm/armreg.h>
92 
93 #ifndef _LOCORE
94 /* 1 == use cpu_sleep(), 0 == don't */
95 extern int cpu_do_powersave;
96 #endif
97 
98 #ifdef __PROG32
99 #ifdef _LOCORE
100 #define IRQdisable \
101 	stmfd	sp!, {r0} ; \
102 	mrs	r0, cpsr ; \
103 	orr	r0, r0, #(I32_bit) ; \
104 	msr	cpsr_c, r0 ; \
105 	ldmfd	sp!, {r0}
106 
107 #define IRQenable \
108 	stmfd	sp!, {r0} ; \
109 	mrs	r0, cpsr ; \
110 	bic	r0, r0, #(I32_bit) ; \
111 	msr	cpsr_c, r0 ; \
112 	ldmfd	sp!, {r0}
113 
114 #else
115 #define IRQdisable __set_cpsr_c(I32_bit, I32_bit);
116 #define IRQenable __set_cpsr_c(I32_bit, 0);
117 #endif	/* _LOCORE */
118 #endif
119 
120 #ifndef _LOCORE
121 
122 /* All the CLKF_* macros take a struct clockframe * as an argument. */
123 
124 /*
125  * CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the
126  * frame came from USR mode or not.
127  */
128 #ifdef __PROG32
129 #define CLKF_USERMODE(frame)	((frame->if_spsr & PSR_MODE) == PSR_USR32_MODE)
130 #else
131 #define CLKF_USERMODE(frame)	((frame->if_r15 & R15_MODE) == R15_MODE_USR)
132 #endif
133 
134 /*
135  * CLKF_BASEPRI: True if we were at spl0 before the interrupt.
136  *
137  * This is hard-wired to 0 on the ARM, since spllowersoftclock() might
138  * not actually be able to unblock the interrupt, which would cause us
139  * to run the softclock interrupts with hardclock blocked.
140  */
141 #define CLKF_BASEPRI(frame)	0
142 
143 /*
144  * CLKF_INTR: True if we took the interrupt from inside another
145  * interrupt handler.
146  */
147 extern int current_intr_depth;
148 #ifdef __PROG32
149 /* Hack to treat FPE time as interrupt time so we can measure it */
150 #define CLKF_INTR(frame)						\
151 	((current_intr_depth > 1) ||					\
152 	    (frame->if_spsr & PSR_MODE) == PSR_UND32_MODE)
153 #else
154 #define CLKF_INTR(frame)	(current_intr_depth > 1)
155 #endif
156 
157 /*
158  * CLKF_PC: Extract the program counter from a clockframe
159  */
160 #ifdef __PROG32
161 #define CLKF_PC(frame)		(frame->if_pc)
162 #else
163 #define CLKF_PC(frame)		(frame->if_r15 & R15_PC)
164 #endif
165 
166 /*
167  * PROC_PC: Find out the program counter for the given process.
168  */
169 #ifdef __PROG32
170 #define PROC_PC(p)	((p)->p_addr->u_pcb.pcb_tf->tf_pc)
171 #else
172 #define PROC_PC(p)	((p)->p_addr->u_pcb.pcb_tf->tf_r15 & R15_PC)
173 #endif
174 
175 /* The address of the vector page. */
176 extern vaddr_t vector_page;
177 #ifdef __PROG32
178 void	arm32_vector_init(vaddr_t, int);
179 
180 #define	ARM_VEC_RESET			(1 << 0)
181 #define	ARM_VEC_UNDEFINED		(1 << 1)
182 #define	ARM_VEC_SWI			(1 << 2)
183 #define	ARM_VEC_PREFETCH_ABORT		(1 << 3)
184 #define	ARM_VEC_DATA_ABORT		(1 << 4)
185 #define	ARM_VEC_ADDRESS_EXCEPTION	(1 << 5)
186 #define	ARM_VEC_IRQ			(1 << 6)
187 #define	ARM_VEC_FIQ			(1 << 7)
188 
189 #define	ARM_NVEC			8
190 #define	ARM_VEC_ALL			0xffffffff
191 #endif
192 
193 /*
194  * Per-CPU information.  For now we assume one CPU.
195  */
196 
197 #include <sys/device.h>
198 #include <sys/sched.h>
199 struct cpu_info {
200 	struct schedstate_percpu ci_schedstate; /* scheduler state */
201 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
202 	u_long ci_spin_locks;		/* # of spin locks held */
203 	u_long ci_simple_locks;		/* # of simple locks held */
204 #endif
205 	struct device *ci_dev;		/* Device corresponding to this CPU */
206 	u_int32_t ci_cpuid;		/* aggregate CPU id */
207 	u_int32_t ci_cputype;		/* CPU type */
208 	u_int32_t ci_cpurev;		/* CPU revision */
209 	u_int32_t ci_ctrl;		/* The CPU control register */
210 	struct evcnt ci_arm700bugcount;
211 };
212 
213 extern struct cpu_info cpu_info_store;
214 #define	curcpu()	(&cpu_info_store)
215 #define cpu_number()	0
216 
217 
218 /*
219  * Scheduling glue
220  */
221 
222 extern int astpending;
223 #define setsoftast() (astpending = 1)
224 
225 /*
226  * Notify the current process (p) that it has a signal pending,
227  * process as soon as possible.
228  */
229 
230 #define signotify(p)            setsoftast()
231 
232 #define cpu_wait(p)	/* nothing */
233 
234 /*
235  * Preempt the current process if in interrupt from user mode,
236  * or after the current trap/syscall if in system mode.
237  */
238 int	want_resched;		/* resched() was called */
239 #define	need_resched(ci)	(want_resched = 1, setsoftast())
240 
241 /*
242  * Give a profiling tick to the current process when the user profiling
243  * buffer pages are invalid.  On the i386, request an ast to send us
244  * through trap(), marking the proc as needing a profiling tick.
245  */
246 #define	need_proftick(p)	((p)->p_flag |= P_OWEUPC, setsoftast())
247 
248 #ifndef acorn26
249 /*
250  * cpu device glue (belongs in cpuvar.h)
251  */
252 
253 struct device;
254 void	cpu_attach	__P((struct device *));
255 #endif
256 
257 
258 /*
259  * Random cruft
260  */
261 
262 /* locore.S */
263 void atomic_set_bit	__P((u_int *address, u_int setmask));
264 void atomic_clear_bit	__P((u_int *address, u_int clearmask));
265 
266 /* cpuswitch.S */
267 struct pcb;
268 void	savectx		__P((struct pcb *pcb));
269 
270 /* ast.c */
271 void userret		__P((register struct proc *p));
272 
273 /* machdep.h */
274 void bootsync		__P((void));
275 
276 /* fault.c */
277 int badaddr_read	__P((void *, size_t, void *));
278 
279 /* syscall.c */
280 void swi_handler	__P((trapframe_t *));
281 
282 #endif	/* !_LOCORE */
283 
284 #endif /* _KERNEL */
285 
286 #endif /* !_ARM_CPU_H_ */
287 
288 /* End of cpu.h */
289