xref: /netbsd-src/sys/arch/arm/imx/imxwdog.c (revision a4103ccd60eed4fd5abc9ece78230186bbac2ca4)
1*a4103ccdSryo /*	$NetBSD: imxwdog.c,v 1.3 2014/09/25 05:05:28 ryo Exp $	*/
247143f5cShkenken 
347143f5cShkenken /*
447143f5cShkenken  * Copyright (c) 2010  Genetec Corporation.  All rights reserved.
547143f5cShkenken  * Written by Hiroyuki Bessho for Genetec Corporation.
647143f5cShkenken  *
747143f5cShkenken  * Redistribution and use in source and binary forms, with or without
847143f5cShkenken  * modification, are permitted provided that the following conditions
947143f5cShkenken  * are met:
1047143f5cShkenken  * 1. Redistributions of source code must retain the above copyright
1147143f5cShkenken  *    notice, this list of conditions and the following disclaimer.
1247143f5cShkenken  * 2. Redistributions in binary form must reproduce the above copyright
1347143f5cShkenken  *    notice, this list of conditions and the following disclaimer in the
1447143f5cShkenken  *    documentation and/or other materials provided with the distribution.
1547143f5cShkenken  *
1647143f5cShkenken  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
1747143f5cShkenken  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
1847143f5cShkenken  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
1947143f5cShkenken  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
2047143f5cShkenken  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2147143f5cShkenken  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2247143f5cShkenken  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2347143f5cShkenken  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2447143f5cShkenken  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2547143f5cShkenken  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2647143f5cShkenken  * POSSIBILITY OF SUCH DAMAGE.
2747143f5cShkenken  */
2847143f5cShkenken 
2947143f5cShkenken #include <sys/cdefs.h>
30*a4103ccdSryo __KERNEL_RCSID(0, "$NetBSD: imxwdog.c,v 1.3 2014/09/25 05:05:28 ryo Exp $");
3147143f5cShkenken 
3247143f5cShkenken #include "opt_imx.h"
3347143f5cShkenken 
3447143f5cShkenken #include <sys/param.h>
3547143f5cShkenken #include <sys/bus.h>
3647143f5cShkenken #include <sys/cpu.h>
3747143f5cShkenken #include <sys/device.h>
3847143f5cShkenken #include <sys/wdog.h>
3947143f5cShkenken 
4047143f5cShkenken #include <prop/proplib.h>
4147143f5cShkenken 
4247143f5cShkenken #include <dev/sysmon/sysmonvar.h>
4347143f5cShkenken 
4447143f5cShkenken #include <arm/imx/imxwdogreg.h>
4547143f5cShkenken #include <arm/imx/imxwdogvar.h>
4647143f5cShkenken 
4747143f5cShkenken struct wdog_softc {
4847143f5cShkenken 	struct sysmon_wdog sc_smw;
4947143f5cShkenken 	device_t sc_dev;
5047143f5cShkenken 	bus_space_tag_t sc_iot;
5147143f5cShkenken 	bus_space_handle_t sc_ioh;
5247143f5cShkenken 
5347143f5cShkenken 	u_int sc_wdog_max_period;
5447143f5cShkenken 	u_int sc_wdog_period;
5547143f5cShkenken 	bool sc_wdog_armed;
5647143f5cShkenken };
5747143f5cShkenken 
5847143f5cShkenken #ifndef IMXWDOG_PERIOD_DEFAULT
5947143f5cShkenken #define	IMXWDOG_PERIOD_DEFAULT	10
6047143f5cShkenken #endif
6147143f5cShkenken 
6247143f5cShkenken CFATTACH_DECL_NEW(imxwdog, sizeof(struct wdog_softc),
6347143f5cShkenken     wdog_match, wdog_attach, NULL, NULL);
6447143f5cShkenken 
6547143f5cShkenken static inline uint16_t
wdog_read(struct wdog_softc * sc,bus_size_t o)6647143f5cShkenken wdog_read(struct wdog_softc *sc, bus_size_t o)
6747143f5cShkenken {
6847143f5cShkenken 	return bus_space_read_2(sc->sc_iot, sc->sc_ioh, o);
6947143f5cShkenken }
7047143f5cShkenken 
7147143f5cShkenken static inline void
wdog_write(struct wdog_softc * sc,bus_size_t o,uint16_t v)7247143f5cShkenken wdog_write(struct wdog_softc *sc, bus_size_t o, uint16_t v)
7347143f5cShkenken {
7447143f5cShkenken 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, o, v);
7547143f5cShkenken }
7647143f5cShkenken 
7747143f5cShkenken static int
wdog_tickle(struct sysmon_wdog * smw)7847143f5cShkenken wdog_tickle(struct sysmon_wdog *smw)
7947143f5cShkenken {
8047143f5cShkenken 	struct wdog_softc * const sc = smw->smw_cookie;
8147143f5cShkenken 
8247143f5cShkenken 	wdog_write(sc, IMX_WDOG_WSR, WSR_MAGIC1);
8347143f5cShkenken 	wdog_write(sc, IMX_WDOG_WSR, WSR_MAGIC2);
8447143f5cShkenken 
8547143f5cShkenken 	return 0;
8647143f5cShkenken }
8747143f5cShkenken 
8847143f5cShkenken static int
wdog_setmode(struct sysmon_wdog * smw)8947143f5cShkenken wdog_setmode(struct sysmon_wdog *smw)
9047143f5cShkenken {
9147143f5cShkenken 	struct wdog_softc * const sc = smw->smw_cookie;
9247143f5cShkenken 	uint16_t reg;
9347143f5cShkenken 
9447143f5cShkenken 	if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) {
9547143f5cShkenken 		/* this chip do not support wdt disable */
9647143f5cShkenken 		aprint_debug_dev(sc->sc_dev, "setmode disable\n");
9747143f5cShkenken 		return sc->sc_wdog_armed ? EBUSY : 0;
9847143f5cShkenken 	}
9947143f5cShkenken 
10047143f5cShkenken 	/*
10147143f5cShkenken 	 * If no changes, just tickle it and return.
10247143f5cShkenken 	 */
10347143f5cShkenken 	if (sc->sc_wdog_armed && smw->smw_period == sc->sc_wdog_period) {
10447143f5cShkenken 		wdog_tickle(smw);
10547143f5cShkenken 		aprint_debug_dev(sc->sc_dev, "setmode refresh\n");
10647143f5cShkenken 		return 0;
10747143f5cShkenken 	}
10847143f5cShkenken 
10947143f5cShkenken 	/* set default */
11047143f5cShkenken 	if (smw->smw_period == WDOG_PERIOD_DEFAULT) {
11147143f5cShkenken 		sc->sc_wdog_period = IMXWDOG_PERIOD_DEFAULT;
11247143f5cShkenken 		smw->smw_period = IMXWDOG_PERIOD_DEFAULT;
11347143f5cShkenken 	}
11447143f5cShkenken 
11547143f5cShkenken 	/*
11647143f5cShkenken 	 * Make sure we don't overflow the counter.
11747143f5cShkenken 	 */
11847143f5cShkenken 	if (smw->smw_period >= sc->sc_wdog_max_period)
11947143f5cShkenken 		return EINVAL;
12047143f5cShkenken 
12147143f5cShkenken 	sc->sc_wdog_period = smw->smw_period;
12247143f5cShkenken 	sc->sc_wdog_armed = true;
12347143f5cShkenken 
12447143f5cShkenken 	reg = wdog_read(sc, IMX_WDOG_WCR);
12547143f5cShkenken 	reg &= ~WCR_WT;
12647143f5cShkenken 	reg |= __SHIFTIN(sc->sc_wdog_period * 2 - 1, WCR_WT);
12747143f5cShkenken 	reg |= WCR_WDE;
12847143f5cShkenken 	wdog_write(sc, IMX_WDOG_WCR, reg);
12947143f5cShkenken 
13047143f5cShkenken 	return 0;
13147143f5cShkenken }
13247143f5cShkenken 
13347143f5cShkenken void
wdog_attach_common(device_t parent,device_t self,bus_space_tag_t iot,paddr_t addr,size_t size,int irq)134b8ec0e33Shkenken wdog_attach_common(device_t parent, device_t self,
13547143f5cShkenken     bus_space_tag_t iot, paddr_t addr, size_t size, int irq)
13647143f5cShkenken {
13747143f5cShkenken 	struct wdog_softc *sc = device_private(self);
13847143f5cShkenken 	uint16_t reg;
13947143f5cShkenken 
14047143f5cShkenken 	sc->sc_dev = self;
14147143f5cShkenken 	sc->sc_iot = iot;
14247143f5cShkenken 	if (bus_space_map(iot, addr, size, 0, &sc->sc_ioh)) {
14347143f5cShkenken 		aprint_error_dev(self, "can't map\n");
14447143f5cShkenken 		return;
14547143f5cShkenken 	}
14647143f5cShkenken 
14747143f5cShkenken 	sc->sc_wdog_armed = __SHIFTOUT(wdog_read(sc, IMX_WDOG_WCR), WCR_WDE);
14847143f5cShkenken 	/*
14947143f5cShkenken 	 * Does the config file tell us to turn on the watchdog?
15047143f5cShkenken 	 */
15147143f5cShkenken 	if (device_cfdata(self)->cf_flags & 1)
15247143f5cShkenken 		sc->sc_wdog_armed = true;
15347143f5cShkenken 
15447143f5cShkenken 	sc->sc_wdog_max_period = 0xff / 2;
15547143f5cShkenken 	sc->sc_wdog_period = IMXWDOG_PERIOD_DEFAULT;
15647143f5cShkenken 
15747143f5cShkenken 	reg = wdog_read(sc, IMX_WDOG_WCR);
15847143f5cShkenken 	reg &= ~WCR_WT;
15947143f5cShkenken 	reg |= __SHIFTIN(sc->sc_wdog_period * 2 - 1, WCR_WT);
16047143f5cShkenken 	wdog_write(sc, IMX_WDOG_WCR, reg);
16147143f5cShkenken 
16247143f5cShkenken 	aprint_naive("\n");
16347143f5cShkenken 	aprint_normal(": i.MX Watchdog Timer, default period is %u seconds%s\n",
16447143f5cShkenken 	    sc->sc_wdog_period,
16547143f5cShkenken 	    sc->sc_wdog_armed ? " (armed)" : "");
16647143f5cShkenken 
16747143f5cShkenken 	sc->sc_smw.smw_name = device_xname(self);
16847143f5cShkenken 	sc->sc_smw.smw_cookie = sc;
16947143f5cShkenken 	sc->sc_smw.smw_setmode = wdog_setmode;
17047143f5cShkenken 	sc->sc_smw.smw_tickle = wdog_tickle;
17147143f5cShkenken 	sc->sc_smw.smw_period = sc->sc_wdog_period;
17247143f5cShkenken 
17347143f5cShkenken 	if (sysmon_wdog_register(&sc->sc_smw) != 0)
17447143f5cShkenken 		aprint_error_dev(self, "unable to register with sysmon\n");
17547143f5cShkenken 
17647143f5cShkenken 	if (sc->sc_wdog_armed) {
17747143f5cShkenken 		int error = sysmon_wdog_setmode(&sc->sc_smw, WDOG_MODE_KTICKLE,
17847143f5cShkenken 		    sc->sc_wdog_period);
17947143f5cShkenken 		if (error)
18047143f5cShkenken 			aprint_error_dev(self,
18147143f5cShkenken 			    "failed to start kernel tickler: %d\n", error);
18247143f5cShkenken 		else {
18347143f5cShkenken 			reg = wdog_read(sc, IMX_WDOG_WCR);
18447143f5cShkenken 			reg |= WCR_WDE;
18547143f5cShkenken 			wdog_write(sc, IMX_WDOG_WCR, reg);
18647143f5cShkenken 		}
18747143f5cShkenken 	}
18847143f5cShkenken }
189