xref: /netbsd-src/sys/arch/arm/imx/imxusb.c (revision 946379e7b37692fc43f68eb0d1c10daa0a7f3b6c)
1 /*	$NetBSD: imxusb.c,v 1.10 2015/09/10 06:32:47 skrll Exp $	*/
2 /*
3  * Copyright (c) 2009, 2010  Genetec Corporation.  All rights reserved.
4  * Written by Hashimoto Kenichi and Hiroyuki Bessho for Genetec Corporation.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
17  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
18  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
19  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25  * POSSIBILITY OF SUCH DAMAGE.
26  */
27 #include <sys/cdefs.h>
28 __KERNEL_RCSID(0, "$NetBSD: imxusb.c,v 1.10 2015/09/10 06:32:47 skrll Exp $");
29 
30 #include "opt_imx.h"
31 
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/conf.h>
35 #include <sys/kernel.h>
36 #include <sys/device.h>
37 #include <sys/intr.h>
38 #include <sys/bus.h>
39 
40 #include <dev/usb/usb.h>
41 #include <dev/usb/usbdi.h>
42 #include <dev/usb/usbdivar.h>
43 #include <dev/usb/usb_mem.h>
44 
45 #include <dev/usb/ehcireg.h>
46 #include <dev/usb/ehcivar.h>
47 
48 #include <arm/pic/picvar.h>	/* XXX: for intr_establish! */
49 
50 #include <arm/imx/imxusbreg.h>
51 #include <arm/imx/imxusbvar.h>
52 #include <arm/imx/imxgpiovar.h>
53 #include "locators.h"
54 
55 #include <dev/usb/ulpireg.h>	/* for test */
56 
57 static int	imxehci_match(device_t, cfdata_t, void *);
58 static void	imxehci_attach(device_t, device_t, void *);
59 
60 uint8_t imxusb_ulpi_read(struct imxehci_softc *sc, int addr);
61 void imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data);
62 static void ulpi_reset(struct imxehci_softc *sc);
63 
64 static void imxehci_select_interface(struct imxehci_softc *, enum imx_usb_if);
65 static void imxehci_init(struct ehci_softc *);
66 
67 /* attach structures */
68 CFATTACH_DECL_NEW(imxehci, sizeof(struct imxehci_softc),
69     imxehci_match, imxehci_attach, NULL, NULL);
70 
71 static int
72 imxehci_match(device_t parent, cfdata_t cf, void *aux)
73 {
74 	struct imxusbc_attach_args *aa = aux;
75 
76 	if (aa->aa_unit < 0 || 3 < aa->aa_unit) {
77 		return 0;
78 	}
79 
80 	return 1;
81 }
82 
83 static void
84 imxehci_attach(device_t parent, device_t self, void *aux)
85 {
86 	struct imxusbc_attach_args *aa = aux;
87 	struct imxusbc_softc *usbc = device_private(parent);
88 	struct imxehci_softc *sc = device_private(self);
89 	ehci_softc_t *hsc = &sc->sc_hsc;
90 	bus_space_tag_t iot;
91 	uint16_t hcirev;
92 	usbd_status r;
93 	uint32_t id, hwhost, hwdevice;
94 	const char *comma;
95 
96 	sc->sc_hsc.sc_dev = self;
97 	iot = sc->sc_iot = sc->sc_hsc.iot = aa->aa_iot;
98 	sc->sc_unit = aa->aa_unit;
99 	sc->sc_usbc = usbc;
100 	hsc->sc_bus.hci_private = sc;
101 	hsc->sc_flags |= EHCIF_ETTF;
102 	hsc->sc_vendor_init = imxehci_init;
103 
104 	aprint_naive("\n");
105 	aprint_normal(": i.MX USB Controller\n");
106 
107 	/* per unit registers */
108 	if (bus_space_subregion(iot, aa->aa_ioh,
109 		aa->aa_unit * IMXUSB_EHCI_SIZE, IMXUSB_EHCI_SIZE,
110 		&sc->sc_ioh) ||
111 	    bus_space_subregion(iot, aa->aa_ioh,
112 		aa->aa_unit * IMXUSB_EHCI_SIZE + IMXUSB_EHCIREGS,
113 		IMXUSB_EHCI_SIZE - IMXUSB_EHCIREGS,
114 		&sc->sc_hsc.ioh)) {
115 
116 		aprint_error_dev(self, "can't subregion\n");
117 		return;
118 	}
119 
120 	id = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_ID);
121 	hcirev = bus_space_read_2(iot, sc->sc_hsc.ioh, EHCI_HCIVERSION);
122 
123 	aprint_normal_dev(self,
124 	    "id=%d revision=%d HCI revision=0x%x\n",
125 	    (int)__SHIFTOUT(id, IMXUSB_ID_ID),
126 	    (int)__SHIFTOUT(id, IMXUSB_ID_REVISION),
127 	    hcirev);
128 
129 	hwhost = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWHOST);
130 	hwdevice = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWDEVICE);
131 
132 	aprint_normal_dev(self, "");
133 
134 	comma = "";
135 	if (hwhost & HWHOST_HC) {
136 		int n_ports = 1 + __SHIFTOUT(hwhost, HWHOST_NPORT);
137 		aprint_normal("%d host port%s",
138 		    n_ports, n_ports > 1 ? "s" : "");
139 		comma = ", ";
140 	}
141 
142 	if (hwdevice & HWDEVICE_DC) {
143 		int n_endpoints = __SHIFTOUT(hwdevice, HWDEVICE_DEVEP);
144 		aprint_normal("%sdevice capable, %d endpoint%s",
145 		    comma,
146 		    n_endpoints, n_endpoints > 1 ? "s" : "");
147 	}
148 	aprint_normal("\n");
149 
150 	sc->sc_hsc.sc_bus.dmatag = aa->aa_dmat;
151 
152 	sc->sc_hsc.sc_offs = bus_space_read_1(iot, sc->sc_hsc.ioh,
153 	    EHCI_CAPLENGTH);
154 
155 	/* Platform dependent setup */
156 	if (usbc->sc_init_md_hook)
157 		usbc->sc_init_md_hook(sc);
158 
159 	imxehci_reset(sc);
160 	imxehci_select_interface(sc, sc->sc_iftype);
161 
162 	if (sc->sc_iftype == IMXUSBC_IF_ULPI) {
163 		bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, 0);
164 
165 		aprint_normal_dev(hsc->sc_dev,
166 		    "ULPI phy VID 0x%04x PID 0x%04x\n",
167 		    (imxusb_ulpi_read(sc, ULPI_VENDOR_ID_LOW) |
168 			imxusb_ulpi_read(sc, ULPI_VENDOR_ID_HIGH) << 8),
169 		    (imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_LOW) |
170 			imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_HIGH) << 8));
171 
172 		ulpi_reset(sc);
173 
174 	}
175 
176 	if (usbc->sc_setup_md_hook)
177 		usbc->sc_setup_md_hook(sc, IMXUSB_HOST);
178 
179 	if (sc->sc_iftype == IMXUSBC_IF_ULPI) {
180 #if 0
181 		if(hsc->sc_bus.usbrev == USBREV_2_0)
182 			ulpi_write(hsc, ULPI_FUNCTION_CONTROL + ULPI_REG_CLEAR, (1 << 0));
183 		else
184 			ulpi_write(hsc, ULPI_FUNCTION_CONTROL + ULPI_REG_SET, (1 << 2));
185 #endif
186 
187 		imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_CLEAR,
188 		    OTG_CONTROL_IDPULLUP);
189 
190 		imxusb_ulpi_write(sc, ULPI_OTG_CONTROL + ULPI_REG_SET,
191 		    OTG_CONTROL_USEEXTVBUSIND |
192 		    OTG_CONTROL_DRVVBUSEXT |
193 		    OTG_CONTROL_DRVVBUS |
194 		    OTG_CONTROL_CHRGVBUS
195 		    );
196 	}
197 
198 	/* Disable interrupts, so we don't get any spurious ones. */
199 	EOWRITE4(hsc, EHCI_USBINTR, 0);
200 
201 	intr_establish(aa->aa_irq, IPL_USB, IST_LEVEL, ehci_intr, hsc);
202 
203 	/* Figure out vendor for root hub descriptor. */
204 	strlcpy(hsc->sc_vendor, "i.MX", sizeof(hsc->sc_vendor));
205 
206 	r = ehci_init(hsc);
207 	if (r != USBD_NORMAL_COMPLETION) {
208 		aprint_error_dev(self, "init failed, error=%d\n", r);
209 		return;
210 	}
211 
212 	/* Attach usb device. */
213 	hsc->sc_child = config_found(self, &hsc->sc_bus, usbctlprint);
214 }
215 
216 static void
217 imxehci_select_interface(struct imxehci_softc *sc, enum imx_usb_if interface)
218 {
219 	uint32_t reg;
220 	struct ehci_softc *hsc = &sc->sc_hsc;
221 
222 	reg = EOREAD4(hsc, EHCI_PORTSC(1));
223 	reg &= ~(PORTSC_PTS | PORTSC_PTW);
224 	switch (interface) {
225 	case IMXUSBC_IF_UTMI_WIDE:
226 		reg |= PORTSC_PTW_16;
227 	case IMXUSBC_IF_UTMI:
228 		reg |= PORTSC_PTS_UTMI;
229 		break;
230 	case IMXUSBC_IF_PHILIPS:
231 		reg |= PORTSC_PTS_PHILIPS;
232 		break;
233 	case IMXUSBC_IF_ULPI:
234 		reg |= PORTSC_PTS_ULPI;
235 		break;
236 	case IMXUSBC_IF_SERIAL:
237 		reg |= PORTSC_PTS_SERIAL;
238 		break;
239 	}
240 	EOWRITE4(hsc, EHCI_PORTSC(1), reg);
241 }
242 
243 static uint32_t
244 ulpi_wakeup(struct imxehci_softc *sc, int tout)
245 {
246 	uint32_t ulpi_view;
247 	int i = 0;
248 	ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW);
249 
250 	if ( !(ulpi_view & ULPI_SS) ) {
251 		bus_space_write_4(sc->sc_iot, sc->sc_ioh,
252 		    IMXUSB_ULPIVIEW, ULPI_WU);
253 		for (i = 0; (tout < 0) || (i < tout); i++) {
254 			ulpi_view = bus_space_read_4(sc->sc_iot,
255 			    sc->sc_ioh, IMXUSB_ULPIVIEW);
256 			if ( !(ulpi_view & ULPI_WU) )
257 				break;
258 			delay(1);
259 		};
260 	}
261 
262 	if ((tout > 0) && (i >= tout)) {
263 		aprint_error_dev(sc->sc_hsc.sc_dev, "%s: timeout\n", __func__);
264 	}
265 
266 	return ulpi_view;
267 }
268 
269 static uint32_t
270 ulpi_wait(struct imxehci_softc *sc, int tout)
271 {
272 	uint32_t ulpi_view;
273 	int i;
274 	ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW);
275 
276 	for (i = 0; (tout < 0) | (i < tout); i++) {
277 		ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
278 		    IMXUSB_ULPIVIEW);
279 		if (!(ulpi_view & ULPI_RUN))
280 			break;
281 		delay(1);
282 	}
283 
284 	if ((tout > 0) && (i >= tout)) {
285 		aprint_error_dev(sc->sc_hsc.sc_dev, "%s: timeout\n", __func__);
286 	}
287 
288 	return ulpi_view;
289 }
290 
291 #define	TIMEOUT	100000
292 
293 uint8_t
294 imxusb_ulpi_read(struct imxehci_softc *sc, int addr)
295 {
296 	uint32_t data;
297 
298 	ulpi_wakeup(sc, TIMEOUT);
299 
300 	data = ULPI_RUN | __SHIFTIN(addr, ULPI_ADDR);
301 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, data);
302 
303 	data = ulpi_wait(sc, TIMEOUT);
304 
305 	return __SHIFTOUT(data, ULPI_DATRD);
306 }
307 
308 void
309 imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data)
310 {
311 	uint32_t reg;
312 
313 	ulpi_wakeup(sc, TIMEOUT);
314 
315 	reg = ULPI_RUN | ULPI_RW | __SHIFTIN(addr, ULPI_ADDR) | __SHIFTIN(data, ULPI_DATWR);
316 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, reg);
317 
318 	ulpi_wait(sc, TIMEOUT);
319 
320 	return;
321 }
322 
323 #if 0
324 static int
325 ulpi_scratch_test(struct imxehci_softc *sc)
326 {
327 	uint32_t ulpi_view;
328 
329 	ulpi_view = ulpi_wakeup(sc, 1000);
330 	if (ulpi_view & ULPI_WU) {
331 		return -1;
332 	}
333 
334 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW,
335 		(ULPI_RUN | ULPI_RW |
336 		 (ULPI_SCRATCH << ULPI_ADDR_SHIFT) | 0xAA));
337 
338 	ulpi_view = ulpi_wait(sc, 1000);
339 
340 	if (ulpi_view & ULPI_RUN) {
341 		return -1;
342 	}
343 
344 	return 0;
345 }
346 #endif
347 
348 static void
349 ulpi_reset(struct imxehci_softc *sc)
350 {
351 	uint8_t data;
352 	int timo = 1000 * 1000;	/* XXXX: 1sec */
353 
354 	imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_SET,
355 	    FUNCTION_CONTROL_RESET /*0x20*/);
356 	do {
357 		data = imxusb_ulpi_read(sc, ULPI_FUNCTION_CONTROL);
358 		if (!(data & FUNCTION_CONTROL_RESET))
359 			break;
360 		delay(100);
361 		timo -= 100;
362 	} while (timo > 0);
363 	if (timo <= 0) {
364 		aprint_error_dev(sc->sc_hsc.sc_dev, "%s: reset failed!!\n",
365 		    __func__);
366 		return;
367 	}
368 
369 	return;
370 }
371 
372 void
373 imxehci_reset(struct imxehci_softc *sc)
374 {
375 	uint32_t reg;
376 	int i;
377 	struct ehci_softc *hsc = &sc->sc_hsc;
378 #define	RESET_TIMEOUT 100
379 
380 	reg = EOREAD4(hsc, EHCI_USBCMD);
381 	reg &= ~EHCI_CMD_RS;
382 	EOWRITE4(hsc, EHCI_USBCMD, reg);
383 
384 	for (i=0; i < RESET_TIMEOUT; ++i) {
385 		reg = EOREAD4(hsc, EHCI_USBCMD);
386 		if ((reg & EHCI_CMD_RS) == 0)
387 			break;
388 		usb_delay_ms(&hsc->sc_bus, 1);
389 	}
390 
391 	EOWRITE4(hsc, EHCI_USBCMD, reg | EHCI_CMD_HCRESET);
392 	for (i = 0; i < RESET_TIMEOUT; i++) {
393 		reg = EOREAD4(hsc, EHCI_USBCMD);
394 		if ((reg &  EHCI_CMD_HCRESET) == 0)
395 			break;
396 		usb_delay_ms(&hsc->sc_bus, 1);
397 	}
398 	if (i >= RESET_TIMEOUT) {
399 		aprint_error_dev(hsc->sc_dev, "reset timeout (%x)\n", reg);
400 	}
401 
402 	usb_delay_ms(&hsc->sc_bus, 100);
403 }
404 
405 static void
406 imxehci_init(struct ehci_softc *hsc)
407 {
408 	struct imxehci_softc *sc = device_private(hsc->sc_dev);
409 	uint32_t reg;
410 
411 	reg = EOREAD4(hsc, EHCI_PORTSC(1));
412 	reg &= ~(EHCI_PS_CSC | EHCI_PS_PEC | EHCI_PS_OCC);
413 	reg |= EHCI_PS_PP | EHCI_PS_PE;
414 	EOWRITE4(hsc, EHCI_PORTSC(1), reg);
415 
416 	reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC);
417 	reg |= OTGSC_IDPU;
418 	/* disable IDIE not to conflict with SSP1_DETECT. */
419 	//reg |= OTGSC_DPIE | OTGSC_IDIE;
420 	reg |= OTGSC_DPIE;
421 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC, reg);
422 
423 	reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_USBMODE);
424 	reg &= ~USBMODE_CM;
425 	reg |= USBMODE_CM_HOST;
426 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_USBMODE, reg);
427 }
428