1*30de1d98Shkenken /* $NetBSD: imxpcievar.h,v 1.3 2019/10/16 11:16:30 hkenken Exp $ */ 2001dea06Shkenken 3001dea06Shkenken /* 4001dea06Shkenken * Copyright (c) 2019 Genetec Corporation. All rights reserved. 5001dea06Shkenken * Written by Hashimoto Kenichi for Genetec Corporation. 6001dea06Shkenken * 7001dea06Shkenken * Redistribution and use in source and binary forms, with or without 8001dea06Shkenken * modification, are permitted provided that the following conditions 9001dea06Shkenken * are met: 10001dea06Shkenken * 1. Redistributions of source code must retain the above copyright 11001dea06Shkenken * notice, this list of conditions and the following disclaimer. 12001dea06Shkenken * 2. Redistributions in binary form must reproduce the above copyright 13001dea06Shkenken * notice, this list of conditions and the following disclaimer in the 14001dea06Shkenken * documentation and/or other materials provided with the distribution. 15001dea06Shkenken * 16001dea06Shkenken * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 17001dea06Shkenken * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18001dea06Shkenken * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19001dea06Shkenken * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 20001dea06Shkenken * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21001dea06Shkenken * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22001dea06Shkenken * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23001dea06Shkenken * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24001dea06Shkenken * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25001dea06Shkenken * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26001dea06Shkenken * POSSIBILITY OF SUCH DAMAGE. 27001dea06Shkenken */ 28001dea06Shkenken 29001dea06Shkenken #ifndef _ARM_IMX_IMXPCIEVAR_H_ 30001dea06Shkenken #define _ARM_IMX_IMXPCIEVAR_H_ 31001dea06Shkenken 32001dea06Shkenken struct imxpcie_ih; 33001dea06Shkenken 34001dea06Shkenken struct imxpcie_softc { 35001dea06Shkenken device_t sc_dev; 36001dea06Shkenken 37001dea06Shkenken bus_space_tag_t sc_iot; 38001dea06Shkenken bus_space_handle_t sc_ioh; 39001dea06Shkenken bus_space_handle_t sc_root_ioh; 40001dea06Shkenken bus_space_handle_t sc_gpr_ioh; 41001dea06Shkenken bus_dma_tag_t sc_dmat; 42001dea06Shkenken 43001dea06Shkenken paddr_t sc_root_addr; 44001dea06Shkenken size_t sc_root_size; 45001dea06Shkenken 46001dea06Shkenken struct arm32_pci_chipset sc_pc; 47001dea06Shkenken 48001dea06Shkenken TAILQ_HEAD(, imxpcie_ih) sc_intrs; 49001dea06Shkenken 50001dea06Shkenken void *sc_ih; 51001dea06Shkenken kmutex_t sc_lock; 52001dea06Shkenken u_int sc_intrgen; 53001dea06Shkenken 54*30de1d98Shkenken struct clk *sc_clk_pcie; 55*30de1d98Shkenken struct clk *sc_clk_pcie_bus; 56*30de1d98Shkenken struct clk *sc_clk_pcie_phy; 571914e34eShkenken struct clk *sc_clk_pcie_ext; 581914e34eShkenken struct clk *sc_clk_pcie_ext_src; 591914e34eShkenken bool sc_ext_osc; 60001dea06Shkenken 61001dea06Shkenken void *sc_cookie; 62001dea06Shkenken void (* sc_pci_netbsd_configure)(void *); 63001dea06Shkenken uint32_t (* sc_gpr_read)(void *, uint32_t); 64001dea06Shkenken void (* sc_gpr_write)(void *, uint32_t, uint32_t); 65001dea06Shkenken void (* sc_reset)(void *); 661914e34eShkenken 671914e34eShkenken bool sc_have_sw_reset; 68001dea06Shkenken }; 69001dea06Shkenken 70001dea06Shkenken struct imxpcie_ih { 71001dea06Shkenken int (*ih_handler)(void *); 72001dea06Shkenken void *ih_arg; 73001dea06Shkenken int ih_ipl; 74001dea06Shkenken TAILQ_ENTRY(imxpcie_ih) ih_entry; 75001dea06Shkenken }; 76001dea06Shkenken 77001dea06Shkenken int imxpcie_intr(void *); 78001dea06Shkenken void imxpcie_attach_common(struct imxpcie_softc *); 79001dea06Shkenken 80001dea06Shkenken #endif /* _ARM_IMX_IMXPCIEVAR_H_ */ 81