1*734527fbSandvar /* $NetBSD: gemini_ipmvar.h,v 1.2 2024/02/10 08:24:50 andvar Exp $ */ 241bfa2c4Scliff 341bfa2c4Scliff #ifndef _GEMINI_IPMVAR_H_ 441bfa2c4Scliff #define _GEMINI_IPMVAR_H_ 541bfa2c4Scliff 641bfa2c4Scliff /* 741bfa2c4Scliff * message queue 841bfa2c4Scliff * 941bfa2c4Scliff * - the queue gets located in memory shared between cores 1041bfa2c4Scliff * - is mapped non-cached so SW coherency is not required. 1141bfa2c4Scliff * - be sure ipm_queue_t starts on 32 bit (min) boundary to align descriptors 12*734527fbSandvar * - note that indices are 8 bit and NIPMDESC < (1<<8) 1341bfa2c4Scliff * be sure to adjust typedef if size is increased 1441bfa2c4Scliff * - current sizes, typedef, and padding make sizeof(ipm_queue_t) == 4096 1541bfa2c4Scliff */ 1641bfa2c4Scliff typedef uint32_t ipmqindex_t; 1741bfa2c4Scliff #define NIPMDESC 255 1841bfa2c4Scliff #define IPMQPADSZ (4096 - ((sizeof(ipm_desc_t) * NIPMDESC) + (2 * sizeof(ipmqindex_t)))) 1941bfa2c4Scliff typedef struct ipm_queue { 2041bfa2c4Scliff ipm_desc_t ipm_desc[NIPMDESC]; 2141bfa2c4Scliff volatile ipmqindex_t ix_write; /* writer increments and inserts here */ 2241bfa2c4Scliff volatile ipmqindex_t ix_read; /* reader extracts here and increments */ 2341bfa2c4Scliff uint8_t pad[IPMQPADSZ]; 2441bfa2c4Scliff } ipm_queue_t; 2541bfa2c4Scliff 2641bfa2c4Scliff static inline ipmqindex_t ipmqnext(ipmqindex_t ix)2741bfa2c4Scliffipmqnext(ipmqindex_t ix) 2841bfa2c4Scliff { 2941bfa2c4Scliff if (++ix >= NIPMDESC) 3041bfa2c4Scliff ix = 0; 3141bfa2c4Scliff return ix; 3241bfa2c4Scliff } 3341bfa2c4Scliff 3441bfa2c4Scliff static inline bool ipmqisempty(ipmqindex_t ixr,ipmqindex_t ixw)3541bfa2c4Scliffipmqisempty(ipmqindex_t ixr, ipmqindex_t ixw) 3641bfa2c4Scliff { 3741bfa2c4Scliff if (ixr == ixw) 3841bfa2c4Scliff return TRUE; 3941bfa2c4Scliff return FALSE; 4041bfa2c4Scliff } 4141bfa2c4Scliff 4241bfa2c4Scliff static inline bool ipmqisfull(ipmqindex_t ixr,ipmqindex_t ixw)4341bfa2c4Scliffipmqisfull(ipmqindex_t ixr, ipmqindex_t ixw) 4441bfa2c4Scliff { 4541bfa2c4Scliff if (ipmqnext(ixw) == ixr) 4641bfa2c4Scliff return TRUE; 4741bfa2c4Scliff return FALSE; 4841bfa2c4Scliff } 4941bfa2c4Scliff 5041bfa2c4Scliff #endif /* _GEMINI_IPMVAR_H_ */ 51