1 /* $NetBSD: footbridge_irqhandler.c,v 1.2 2001/09/05 16:17:35 matt Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1997 Causality Limited 6 * Copyright (c) 1994 Brini. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by Mark Brinicombe 20 * for the NetBSD Project. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: iomd_irqhandler.c,v 1.16 $ 38 */ 39 40 #include "opt_irqstats.h" 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/syslog.h> 45 #include <sys/malloc.h> 46 #include <uvm/uvm_extern.h> 47 48 #include <machine/intr.h> 49 #include <machine/cpu.h> 50 51 irqhandler_t *irqhandlers[NIRQS]; 52 53 int current_intr_depth; /* Depth of interrupt nesting */ 54 u_int intr_claimed_mask; /* Interrupts that are claimed */ 55 u_int intr_disabled_mask; /* Interrupts that are temporarily disabled */ 56 u_int intr_current_mask; /* Interrupts currently allowable */ 57 u_int spl_mask; 58 u_int irqmasks[IPL_LEVELS]; 59 u_int irqblock[NIRQS]; 60 61 extern u_int soft_interrupts; /* Only so we can initialise it */ 62 63 extern char *_intrnames; 64 extern void set_spl_masks __P((void)); 65 66 void 67 irq_init(void) 68 { 69 int loop; 70 71 /* Clear all the IRQ handlers and the irq block masks */ 72 for (loop = 0; loop < NIRQS; ++loop) { 73 irqhandlers[loop] = NULL; 74 irqblock[loop] = 0; 75 } 76 77 /* 78 * Setup the irqmasks for the different Interrupt Priority Levels 79 * We will start with no bits set and these will be updated as handlers 80 * are installed at different IPL's. 81 */ 82 for (loop = 0; loop < IPL_LEVELS; ++loop) 83 irqmasks[loop] = 0; 84 85 current_intr_depth = 0; 86 intr_claimed_mask = 0x00000000; 87 intr_disabled_mask = 0x00000000; 88 intr_current_mask = 0x00000000; 89 spl_mask = 0x00000000; 90 soft_interrupts = 0x00000000; 91 92 set_spl_masks(); 93 irq_setmasks(); 94 95 /* Enable IRQ's and FIQ's */ 96 enable_interrupts(I32_bit | F32_bit); 97 } 98 99 void 100 stray_irqhandler() 101 { 102 panic("stray irq\n"); 103 } 104 105 /* 106 * void disable_irq(int irq) 107 * 108 * Disables a specific irq. The irq is removed from the master irq mask 109 * 110 * Use of this function outside this file is deprecated. 111 */ 112 113 void 114 disable_irq(irq) 115 int irq; 116 { 117 int oldirqstate; 118 119 oldirqstate = disable_interrupts(I32_bit); 120 intr_claimed_mask &= ~(1 << irq); 121 intr_current_mask = intr_claimed_mask & ~intr_disabled_mask; 122 irq_setmasks(); 123 restore_interrupts(oldirqstate); 124 } 125 126 127 /* 128 * void enable_irq(int irq) 129 * 130 * Enables a specific irq. The irq is added to the master irq mask 131 * This routine should be used with caution. A handler should already 132 * be installed. 133 * 134 * Use of this function outside this file is deprecated. 135 */ 136 137 void 138 enable_irq(irq) 139 int irq; 140 { 141 u_int oldirqstate; 142 143 oldirqstate = disable_interrupts(I32_bit); 144 intr_claimed_mask |= (1 << irq); 145 intr_current_mask = intr_claimed_mask & ~intr_disabled_mask; 146 irq_setmasks(); 147 restore_interrupts(oldirqstate); 148 } 149 150 /* 151 * int irq_claim(int irq, irqhandler_t *handler) 152 * 153 * Enable an IRQ and install a handler for it. 154 */ 155 156 int 157 irq_claim(irq, handler) 158 int irq; 159 irqhandler_t *handler; 160 { 161 int level; 162 int loop; 163 164 #ifdef DIAGNOSTIC 165 /* Sanity check */ 166 if (handler == NULL) 167 panic("NULL interrupt handler\n"); 168 if (handler->ih_func == NULL) 169 panic("Interrupt handler does not have a function\n"); 170 #endif /* DIAGNOSTIC */ 171 172 /* 173 * IRQ_INSTRUCT indicates that we should get the irq number 174 * from the irq structure 175 */ 176 if (irq == IRQ_INSTRUCT) 177 irq = handler->ih_num; 178 179 /* Make sure the irq number is valid */ 180 if (irq < 0 || irq >= NIRQS) 181 return(-1); 182 183 /* Make sure the level is valid */ 184 if (handler->ih_level < 0 || handler->ih_level >= IPL_LEVELS) 185 return(-1); 186 187 /* Attach handler at top of chain */ 188 handler->ih_next = irqhandlers[irq]; 189 irqhandlers[irq] = handler; 190 191 /* 192 * Reset the flags for this handler. 193 * As the handler is now in the chain mark it as active. 194 */ 195 handler->ih_flags = 0 | IRQ_FLAG_ACTIVE; 196 197 /* 198 * Record the interrupt number for accounting. 199 * Done here as the accounting number may not be the same as the IRQ number 200 * though for the moment they are 201 */ 202 handler->ih_num = irq; 203 204 #ifdef IRQSTATS 205 /* Get the interrupt name from the head of the list */ 206 if (handler->ih_name) { 207 char *ptr = _intrnames + (irq * 14); 208 strcpy(ptr, " "); 209 strncpy(ptr, handler->ih_name, 210 min(strlen(handler->ih_name), 13)); 211 } else { 212 char *ptr = _intrnames + (irq * 14); 213 sprintf(ptr, "irq %2d ", irq); 214 } 215 #endif /* IRQSTATS */ 216 217 /* 218 * Update the irq masks. 219 * If ih_level is out of range then don't bother to update 220 * the masks. 221 */ 222 if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) { 223 irqhandler_t *ptr; 224 225 /* 226 * Find the lowest interrupt priority on the irq chain. 227 * Interrupt is allowable at priorities lower than this. 228 */ 229 ptr = irqhandlers[irq]; 230 if (ptr) { 231 level = ptr->ih_level - 1; 232 while (ptr) { 233 if (ptr->ih_level - 1 < level) 234 level = ptr->ih_level - 1; 235 ptr = ptr->ih_next; 236 } 237 for (loop = 0; loop < IPL_LEVELS; ++loop) { 238 if (level >= loop) 239 irqmasks[loop] |= (1 << irq); 240 else 241 irqmasks[loop] &= ~(1 << irq); 242 } 243 } 244 245 #include "sl.h" 246 #include "ppp.h" 247 #if NSL > 0 || NPPP > 0 248 /* In the presence of SLIP or PPP, splimp > spltty. */ 249 irqmasks[IPL_NET] &= irqmasks[IPL_TTY]; 250 #endif 251 } 252 253 /* 254 * We now need to update the irqblock array. This array indicates 255 * what other interrupts should be blocked when interrupt is asserted 256 * This basically emulates hardware interrupt priorities e.g. by blocking 257 * all other IPL_BIO interrupts with an IPL_BIO interrupt is asserted. 258 * For each interrupt we find the highest IPL and set the block mask to 259 * the interrupt mask for that level. 260 */ 261 for (loop = 0; loop < NIRQS; ++loop) { 262 irqhandler_t *ptr; 263 264 ptr = irqhandlers[loop]; 265 if (ptr) { 266 /* There is at least 1 handler so scan the chain */ 267 level = ptr->ih_level; 268 while (ptr) { 269 if (ptr->ih_level > level) 270 level = ptr->ih_level; 271 ptr = ptr->ih_next; 272 } 273 irqblock[loop] = ~irqmasks[level]; 274 } else 275 /* No handlers for this irq so nothing to block */ 276 irqblock[loop] = 0; 277 } 278 279 enable_irq(irq); 280 set_spl_masks(); 281 282 return(0); 283 } 284 285 286 /* 287 * int irq_release(int irq, irqhandler_t *handler) 288 * 289 * Disable an IRQ and remove a handler for it. 290 */ 291 292 int 293 irq_release(irq, handler) 294 int irq; 295 irqhandler_t *handler; 296 { 297 int level; 298 int loop; 299 irqhandler_t *irqhand; 300 irqhandler_t **prehand; 301 #ifdef IRQSTATS 302 extern char *_intrnames; 303 #endif /* IRQSTATS */ 304 /* 305 * IRQ_INSTRUCT indicates that we should get the irq number 306 * from the irq structure 307 */ 308 if (irq == IRQ_INSTRUCT) 309 irq = handler->ih_num; 310 311 /* Make sure the irq number is valid */ 312 if (irq < 0 || irq >= NIRQS) 313 return(-1); 314 315 /* Locate the handler */ 316 irqhand = irqhandlers[irq]; 317 prehand = &irqhandlers[irq]; 318 319 while (irqhand && handler != irqhand) { 320 prehand = &irqhand->ih_next; 321 irqhand = irqhand->ih_next; 322 } 323 324 /* Remove the handler if located */ 325 if (irqhand) 326 *prehand = irqhand->ih_next; 327 else 328 return(-1); 329 330 /* Now the handler has been removed from the chain mark is as inactive */ 331 irqhand->ih_flags &= ~IRQ_FLAG_ACTIVE; 332 333 /* Make sure the head of the handler list is active */ 334 if (irqhandlers[irq]) 335 irqhandlers[irq]->ih_flags |= IRQ_FLAG_ACTIVE; 336 337 #ifdef IRQSTATS 338 /* Get the interrupt name from the head of the list */ 339 if (irqhandlers[irq] && irqhandlers[irq]->ih_name) { 340 char *ptr = _intrnames + (irq * 14); 341 strcpy(ptr, " "); 342 strncpy(ptr, irqhandlers[irq]->ih_name, 343 min(strlen(irqhandlers[irq]->ih_name), 13)); 344 } else { 345 char *ptr = _intrnames + (irq * 14); 346 sprintf(ptr, "irq %2d ", irq); 347 } 348 #endif /* IRQSTATS */ 349 350 /* 351 * Update the irq masks. 352 * If ih_level is out of range then don't bother to update 353 * the masks. 354 */ 355 if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) { 356 irqhandler_t *ptr; 357 358 /* 359 * Find the lowest interrupt priority on the irq chain. 360 * Interrupt is allowable at priorities lower than this. 361 */ 362 ptr = irqhandlers[irq]; 363 if (ptr) { 364 level = ptr->ih_level - 1; 365 while (ptr) { 366 if (ptr->ih_level - 1 < level) 367 level = ptr->ih_level - 1; 368 ptr = ptr->ih_next; 369 } 370 for (loop = 0; loop < IPL_LEVELS; ++loop) { 371 if (level >= loop) 372 irqmasks[loop] |= (1 << irq); 373 else 374 irqmasks[loop] &= ~(1 << irq); 375 } 376 } 377 } 378 379 /* 380 * We now need to update the irqblock array. This array indicates 381 * what other interrupts should be blocked when interrupt is asserted 382 * This basically emulates hardware interrupt priorities e.g. by 383 * blocking all other IPL_BIO interrupts with an IPL_BIO interrupt 384 * is asserted. For each interrupt we find the highest IPL and set 385 * the block mask to the interrupt mask for that level. 386 */ 387 for (loop = 0; loop < NIRQS; ++loop) { 388 irqhandler_t *ptr; 389 390 ptr = irqhandlers[loop]; 391 if (ptr) { 392 /* There is at least 1 handler so scan the chain */ 393 level = ptr->ih_level; 394 while (ptr) { 395 if (ptr->ih_level > level) 396 level = ptr->ih_level; 397 ptr = ptr->ih_next; 398 } 399 irqblock[loop] = ~irqmasks[level]; 400 } else 401 /* No handlers for this irq so nothing to block */ 402 irqblock[loop] = 0; 403 } 404 405 /* 406 * Disable the appropriate mask bit if there are no handlers left for 407 * this IRQ. 408 */ 409 if (irqhandlers[irq] == NULL) 410 disable_irq(irq); 411 412 set_spl_masks(); 413 414 return(0); 415 } 416 417 418 void * 419 intr_claim(irq, level, name, ih_func, ih_arg) 420 int irq; 421 int level; 422 const char *name; 423 int (*ih_func) __P((void *)); 424 void *ih_arg; 425 { 426 irqhandler_t *ih; 427 428 ih = malloc(sizeof(*ih), M_DEVBUF, M_NOWAIT); 429 if (!ih) 430 panic("intr_claim(): Cannot malloc handler memory\n"); 431 432 ih->ih_level = level; 433 ih->ih_name = name; 434 ih->ih_func = ih_func; 435 ih->ih_arg = ih_arg; 436 ih->ih_flags = 0; 437 438 if (irq_claim(irq, ih) != 0) 439 return(NULL); 440 return(ih); 441 } 442 443 444 int 445 intr_release(arg) 446 void *arg; 447 { 448 irqhandler_t *ih = (irqhandler_t *)arg; 449 450 if (irq_release(ih->ih_num, ih) == 0) { 451 free(ih, M_DEVBUF); 452 return(0); 453 } 454 return(1); 455 } 456