1 /* $NetBSD: footbridge_intr.h,v 1.16 2014/02/04 18:51:16 matt Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #ifndef _FOOTBRIDGE_INTR_H_ 39 #define _FOOTBRIDGE_INTR_H_ 40 41 #include <arm/cpu.h> 42 #include <arm/armreg.h> 43 44 #define IPL_NONE 0 /* nothing */ 45 #define IPL_SOFTCLOCK 1 /* clock soft interrupts */ 46 #define IPL_SOFTBIO 2 /* block i/o */ 47 #define IPL_SOFTNET 3 /* network software interrupts */ 48 #define IPL_SOFTSERIAL 4 /* serial software interrupts */ 49 #define IPL_VM 5 /* memory allocation */ 50 #define IPL_SCHED 6 /* clock */ 51 #define IPL_HIGH 7 /* everything */ 52 53 #define NIPL 8 54 55 #define IST_UNUSABLE -1 /* interrupt cannot be used */ 56 #define IST_NONE 0 /* none (dummy) */ 57 #define IST_PULSE 1 /* pulsed */ 58 #define IST_EDGE 2 /* edge-triggered */ 59 #define IST_LEVEL 3 /* level-triggered */ 60 61 #define ARM_IRQ_HANDLER _C_LABEL(footbridge_intr_dispatch) 62 63 #ifndef _LOCORE 64 #include <arm/cpufunc.h> 65 66 #include <arm/footbridge/dc21285mem.h> 67 #include <arm/footbridge/dc21285reg.h> 68 69 #define INT_SWMASK \ 70 ((1U << IRQ_SOFTINT) | (1U << IRQ_RESERVED0) | \ 71 (1U << IRQ_RESERVED1) | (1U << IRQ_RESERVED2)) 72 #define ICU_INT_HWMASK (0xffffffff & ~(INT_SWMASK | (1U << IRQ_RESERVED3))) 73 74 /* only call this with interrupts off */ 75 static inline void __attribute__((__unused__)) 76 footbridge_set_intrmask(void) 77 { 78 extern volatile uint32_t intr_enabled; 79 volatile uint32_t * const dc21285_armcsr_vbase = 80 (volatile uint32_t *)(DC21285_ARMCSR_VBASE); 81 82 /* fetch once so we write the same number to both registers */ 83 uint32_t tmp = intr_enabled & ICU_INT_HWMASK; 84 85 dc21285_armcsr_vbase[IRQ_ENABLE_SET>>2] = tmp; 86 dc21285_armcsr_vbase[IRQ_ENABLE_CLEAR>>2] = ~tmp; 87 } 88 89 static inline void __attribute__((__unused__)) 90 footbridge_splx(int ipl) 91 { 92 extern int footbridge_imask[]; 93 extern volatile uint32_t intr_enabled; 94 extern volatile int footbridge_ipending; 95 int oldirqstate, hwpend; 96 97 /* Don't let the compiler re-order this code with preceding code */ 98 __insn_barrier(); 99 100 set_curcpl(ipl); 101 102 hwpend = footbridge_ipending & ICU_INT_HWMASK & ~footbridge_imask[ipl]; 103 if (hwpend != 0) { 104 oldirqstate = disable_interrupts(I32_bit); 105 intr_enabled |= hwpend; 106 footbridge_set_intrmask(); 107 restore_interrupts(oldirqstate); 108 } 109 110 #ifdef __HAVE_FAST_SOFTINTS 111 cpu_dosoftints(); 112 #endif 113 } 114 115 static inline int __attribute__((__unused__)) 116 footbridge_splraise(int ipl) 117 { 118 int old; 119 120 old = curcpl(); 121 set_curcpl(ipl); 122 123 /* Don't let the compiler re-order this code with subsequent code */ 124 __insn_barrier(); 125 126 return (old); 127 } 128 129 static inline int __attribute__((__unused__)) 130 footbridge_spllower(int ipl) 131 { 132 int old = curcpl(); 133 134 footbridge_splx(ipl); 135 return(old); 136 } 137 138 /* should only be defined in footbridge_intr.c */ 139 #if !defined(ARM_SPL_NOINLINE) 140 141 #define splx(newspl) footbridge_splx(newspl) 142 #define _spllower(ipl) footbridge_spllower(ipl) 143 #define _splraise(ipl) footbridge_splraise(ipl) 144 145 #else 146 147 int _splraise(int); 148 int _spllower(int); 149 void splx(int); 150 151 #endif /* ! ARM_SPL_NOINLINE */ 152 153 #include <sys/evcnt.h> 154 #include <sys/queue.h> 155 #include <machine/irqhandler.h> 156 157 #define splsoft() _splraise(IPL_SOFT) 158 159 #define spl0() (void)_spllower(IPL_NONE) 160 #define spllowersoftclock() (void)_spllower(IPL_SOFTCLOCK) 161 162 typedef uint8_t ipl_t; 163 typedef struct { 164 ipl_t _ipl; 165 } ipl_cookie_t; 166 167 static inline ipl_cookie_t 168 makeiplcookie(ipl_t ipl) 169 { 170 171 return (ipl_cookie_t){._ipl = ipl}; 172 } 173 174 static inline int 175 splraiseipl(ipl_cookie_t icookie) 176 { 177 178 return _splraise(icookie._ipl); 179 } 180 181 #include <sys/spl.h> 182 183 /* footbridge has 32 interrupt lines */ 184 #define NIRQ 32 185 186 struct intrhand { 187 TAILQ_ENTRY(intrhand) ih_list; /* link on intrq list */ 188 int (*ih_func)(void *); /* handler */ 189 void *ih_arg; /* arg for handler */ 190 int ih_ipl; /* IPL_* */ 191 int ih_irq; /* IRQ number */ 192 }; 193 194 #define IRQNAMESIZE sizeof("footbridge irq 31") 195 196 struct intrq { 197 TAILQ_HEAD(, intrhand) iq_list; /* handler list */ 198 struct evcnt iq_ev; /* event counter */ 199 int iq_mask; /* IRQs to mask while handling */ 200 int iq_levels; /* IPL_*'s this IRQ has */ 201 int iq_ist; /* share type */ 202 int iq_ipl; /* max ipl */ 203 char iq_name[IRQNAMESIZE]; /* interrupt name */ 204 }; 205 206 #endif /* _LOCORE */ 207 208 #endif /* _FOOTBRIDGE_INTR_H */ 209