xref: /netbsd-src/sys/arch/arm/footbridge/footbridge_intr.h (revision 5dd36a3bc8bf2a9dec29ceb6349550414570c447)
1 /* 	$NetBSD: footbridge_intr.h,v 1.20 2018/06/01 21:22:43 mrg Exp $	*/
2 
3 /*
4  * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed for the NetBSD Project by
20  *	Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #ifndef _FOOTBRIDGE_INTR_H_
39 #define _FOOTBRIDGE_INTR_H_
40 
41 #ifndef _LOCORE
42 typedef uint8_t ipl_t;
43 typedef struct {
44 	ipl_t _ipl;
45 } ipl_cookie_t;
46 
47 #include <arm/mutex.h>
48 #endif
49 #include <sys/param.h>
50 #include <arm/cpu.h>
51 #include <arm/armreg.h>
52 
53 #define IPL_NONE	0	/* nothing */
54 #define IPL_SOFTCLOCK	1	/* clock soft interrupts */
55 #define IPL_SOFTBIO	2	/* block i/o */
56 #define IPL_SOFTNET	3	/* network software interrupts */
57 #define IPL_SOFTSERIAL	4	/* serial software interrupts */
58 #define IPL_VM		5	/* memory allocation */
59 #define IPL_SCHED	6	/* clock */
60 #define IPL_HIGH	7	/* everything */
61 
62 #define NIPL		8
63 
64 #define	IST_UNUSABLE	-1	/* interrupt cannot be used */
65 #define	IST_NONE	0	/* none (dummy) */
66 #define	IST_PULSE	1	/* pulsed */
67 #define	IST_EDGE	2	/* edge-triggered */
68 #define	IST_LEVEL	3	/* level-triggered */
69 
70 #define	ARM_IRQ_HANDLER	_C_LABEL(footbridge_intr_dispatch)
71 
72 #ifndef _LOCORE
73 #include <arm/cpufunc.h>
74 
75 #include <arm/footbridge/dc21285mem.h>
76 #include <arm/footbridge/dc21285reg.h>
77 
78 #define INT_SWMASK							\
79 	((1U << IRQ_SOFTINT) | (1U << IRQ_RESERVED0) |			\
80 	 (1U << IRQ_RESERVED1) | (1U << IRQ_RESERVED2))
81 #define ICU_INT_HWMASK	(0xffffffff & ~(INT_SWMASK |  (1U << IRQ_RESERVED3)))
82 
83 /* only call this with interrupts off */
84 static inline void __attribute__((__unused__))
85 footbridge_set_intrmask(void)
86 {
87 	extern volatile uint32_t intr_enabled;
88 	volatile uint32_t * const dc21285_armcsr_vbase =
89 	    (volatile uint32_t *)(DC21285_ARMCSR_VBASE);
90 
91 	/* fetch once so we write the same number to both registers */
92 	uint32_t tmp = intr_enabled & ICU_INT_HWMASK;
93 
94 	dc21285_armcsr_vbase[IRQ_ENABLE_SET>>2] = tmp;
95 	dc21285_armcsr_vbase[IRQ_ENABLE_CLEAR>>2] = ~tmp;
96 }
97 
98 static inline void __attribute__((__unused__))
99 footbridge_splx(int ipl)
100 {
101 	extern int footbridge_imask[];
102 	extern volatile uint32_t intr_enabled;
103 	extern volatile int footbridge_ipending;
104 	int oldirqstate, hwpend;
105 
106 	/* Don't let the compiler re-order this code with preceding code */
107 	__insn_barrier();
108 
109 	set_curcpl(ipl);
110 
111 	hwpend = footbridge_ipending & ICU_INT_HWMASK & ~footbridge_imask[ipl];
112 	if (hwpend != 0) {
113 		oldirqstate = disable_interrupts(I32_bit);
114 		intr_enabled |= hwpend;
115 		footbridge_set_intrmask();
116 		restore_interrupts(oldirqstate);
117 	}
118 
119 #ifdef __HAVE_FAST_SOFTINTS
120 	cpu_dosoftints();
121 #endif
122 }
123 
124 static inline int __attribute__((__unused__))
125 footbridge_splraise(int ipl)
126 {
127 	int	old;
128 
129 	old = curcpl();
130 	set_curcpl(ipl);
131 
132 	/* Don't let the compiler re-order this code with subsequent code */
133 	__insn_barrier();
134 
135 	return (old);
136 }
137 
138 static inline int __attribute__((__unused__))
139 footbridge_spllower(int ipl)
140 {
141 	int old = curcpl();
142 
143 	footbridge_splx(ipl);
144 	return(old);
145 }
146 
147 /* should only be defined in footbridge_intr.c */
148 #if !defined(ARM_SPL_NOINLINE)
149 
150 #define splx(newspl)		footbridge_splx(newspl)
151 #define	_spllower(ipl)		footbridge_spllower(ipl)
152 #define	_splraise(ipl)		footbridge_splraise(ipl)
153 
154 #else
155 
156 int	_splraise(int);
157 int	_spllower(int);
158 void	splx(int);
159 
160 #endif /* ! ARM_SPL_NOINLINE */
161 
162 #include <sys/evcnt.h>
163 #include <sys/queue.h>
164 #include <machine/irqhandler.h>
165 
166 #define	splsoft()	_splraise(IPL_SOFT)
167 
168 #define	spl0()		(void)_spllower(IPL_NONE)
169 #define	spllowersoftclock() (void)_spllower(IPL_SOFTCLOCK)
170 
171 
172 static inline ipl_cookie_t
173 makeiplcookie(ipl_t ipl)
174 {
175 
176 	return (ipl_cookie_t){._ipl = ipl};
177 }
178 
179 static inline int
180 splraiseipl(ipl_cookie_t icookie)
181 {
182 
183 	return _splraise(icookie._ipl);
184 }
185 
186 #include <sys/spl.h>
187 
188 /* footbridge has 32 interrupt lines */
189 #define	NIRQ		32
190 
191 struct intrhand {
192 	TAILQ_ENTRY(intrhand) ih_list;	/* link on intrq list */
193 	int (*ih_func)(void *);		/* handler */
194 	void *ih_arg;			/* arg for handler */
195 	int ih_ipl;			/* IPL_* */
196 	int ih_irq;			/* IRQ number */
197 };
198 
199 #define	IRQNAMESIZE	sizeof("footbridge irq 31")
200 
201 struct intrq {
202 	TAILQ_HEAD(, intrhand) iq_list;	/* handler list */
203 	struct evcnt iq_ev;		/* event counter */
204 	int iq_mask;			/* IRQs to mask while handling */
205 	int iq_levels;			/* IPL_*'s this IRQ has */
206 	int iq_ist;			/* share type */
207 	int iq_ipl;			/* max ipl */
208 	char iq_name[IRQNAMESIZE];	/* interrupt name */
209 };
210 
211 #endif /* _LOCORE */
212 
213 #endif	/* _FOOTBRIDGE_INTR_H */
214