xref: /netbsd-src/sys/arch/arm/fdt/psci_fdt.c (revision aec8c8c947e3e303c899c5ed8cc6479f070b47f5)
1 /* $NetBSD: psci_fdt.c,v 1.2 2017/08/05 11:58:19 jmcneill Exp $ */
2 
3 /*-
4  * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include "opt_multiprocessor.h"
30 
31 #include <sys/cdefs.h>
32 __KERNEL_RCSID(0, "$NetBSD: psci_fdt.c,v 1.2 2017/08/05 11:58:19 jmcneill Exp $");
33 
34 #include <sys/param.h>
35 #include <sys/bus.h>
36 #include <sys/device.h>
37 #include <sys/systm.h>
38 #include <sys/kernel.h>
39 
40 #include <dev/fdt/fdtvar.h>
41 
42 #include <arm/locore.h>
43 #include <arm/armreg.h>
44 
45 #include <arm/arm/psci.h>
46 #include <arm/fdt/psci_fdt.h>
47 
48 static int	psci_fdt_match(device_t, cfdata_t, void *);
49 static void	psci_fdt_attach(device_t, device_t, void *);
50 
51 static int	psci_fdt_init(const int);
52 
53 static const char * const compatible[] = {
54 	"arm,psci",
55 	"arm,psci-0.2",
56 	"arm,psci-1.0",
57 	NULL
58 };
59 
60 CFATTACH_DECL_NEW(psci_fdt, 0, psci_fdt_match, psci_fdt_attach, NULL, NULL);
61 
62 static int
63 psci_fdt_match(device_t parent, cfdata_t cf, void *aux)
64 {
65 	struct fdt_attach_args * const faa = aux;
66 
67 	return of_match_compatible(faa->faa_phandle, compatible);
68 }
69 
70 static void
71 psci_fdt_attach(device_t parent, device_t self, void *aux)
72 {
73 	struct fdt_attach_args * const faa = aux;
74 	const int phandle = faa->faa_phandle;
75 
76 	psci_fdt_init(phandle);
77 
78 	const uint32_t ver = psci_version();
79 	const u_int ver_maj = __SHIFTOUT(ver, PSCI_VERSION_MAJOR);
80 	const u_int ver_min = __SHIFTOUT(ver, PSCI_VERSION_MINOR);
81 
82 	aprint_naive("\n");
83 	aprint_normal(": PSCI %u.%u\n", ver_maj, ver_min);
84 }
85 
86 static int
87 psci_fdt_init(const int phandle)
88 {
89 	char method[4];
90 	uint32_t val;
91 
92 	if (!of_hasprop(phandle, "method")) {
93 		aprint_error("PSCI: missing 'method' property\n");
94 		return EINVAL;
95 	}
96 
97 	OF_getprop(phandle, "method", method, sizeof(method));
98 	if (strcmp(method, "smc") == 0)
99 		psci_init(psci_call_smc);
100 	else if (strcmp(method, "hvc") == 0)
101 		psci_init(psci_call_hvc);
102 	else {
103 		aprint_error("PSCI: unsupported method '%s'\n", method);
104 		return EINVAL;
105 	}
106 
107 	const char * const compat_0_1[] = { "arm,psci", NULL };
108 	if (of_match_compatible(phandle, compat_0_1)) {
109 		psci_clearfunc();
110 		if (of_getprop_uint32(phandle, "cpu_on", &val) == 0)
111 			psci_setfunc(PSCI_FUNC_CPU_ON, val);
112 	}
113 
114 	return 0;
115 }
116 
117 void
118 psci_fdt_bootstrap(void)
119 {
120 #ifdef MULTIPROCESSOR
121 	extern void cortex_mpstart(void);
122 	bus_addr_t mpidr;
123 	uint32_t bp_mpidr;
124 	int child;
125 
126 	const int cpus = OF_finddevice("/cpus");
127 	if (cpus == -1) {
128 		aprint_error("PSCI: no /cpus node found\n");
129 		arm_cpu_max = 1;
130 		return;
131 	}
132 
133 	/* Count CPUs */
134 	arm_cpu_max = 0;
135 	for (child = OF_child(cpus); child; child = OF_peer(child))
136 		if (fdtbus_status_okay(child))
137 			arm_cpu_max++;
138 
139 	const int phandle = OF_finddevice("/psci");
140 	if (phandle == -1) {
141 		aprint_error("PSCI: no /psci node found\n");
142 		return;
143 	}
144 
145 	if (psci_fdt_init(phandle) != 0)
146 		return;
147 
148 	/* MPIDR affinity levels of boot processor. */
149 	bp_mpidr = armreg_mpidr_read() & (MPIDR_AFF2|MPIDR_AFF1|MPIDR_AFF0);
150 
151 	/* Boot APs */
152 	uint32_t started = 0;
153 	for (child = OF_child(cpus); child; child = OF_peer(child)) {
154 		if (!fdtbus_status_okay(child))
155 			continue;
156 		if (fdtbus_get_reg(child, 0, &mpidr, NULL) != 0)
157 			continue;
158 		if (mpidr == bp_mpidr)
159 			continue; 	/* BP already started */
160 
161 		/* XXX NetBSD requires all CPUs to be in the same cluster */
162 		const u_int bp_clid = __SHIFTOUT(bp_mpidr, CORTEXA9_MPIDR_CLID);
163 		const u_int clid = __SHIFTOUT(mpidr, CORTEXA9_MPIDR_CLID);
164 		if (bp_clid != clid)
165 			continue;
166 
167 		const u_int cpuid = __SHIFTOUT(mpidr, CORTEXA9_MPIDR_CPUID);
168 		int ret = psci_cpu_on(cpuid, (register_t)cortex_mpstart, 0);
169 		if (ret == PSCI_SUCCESS)
170 			started |= __BIT(cpuid);
171 	}
172 
173 	/* Wait for APs to start */
174 	for (u_int i = 0x10000000; i > 0; i--) {
175 		arm_dmb();
176 		if (arm_cpu_hatched == started)
177 			break;
178 	}
179 #endif
180 }
181