xref: /netbsd-src/sys/arch/arm/fdt/plcom_fdt.c (revision 8ecbf5f02b752fcb7debe1a8fab1dc82602bc760)
1 /* $NetBSD: plcom_fdt.c,v 1.3 2018/10/23 09:15:35 jmcneill Exp $ */
2 
3 /*-
4  * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: plcom_fdt.c,v 1.3 2018/10/23 09:15:35 jmcneill Exp $");
31 
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/device.h>
35 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 
38 #include <dev/fdt/fdtvar.h>
39 
40 #include <evbarm/dev/plcomreg.h>
41 #include <evbarm/dev/plcomvar.h>
42 
43 static int	plcom_fdt_match(device_t, cfdata_t, void *);
44 static void	plcom_fdt_attach(device_t, device_t, void *);
45 
46 static const char * const compatible[] = { "arm,pl011", NULL };
47 
48 CFATTACH_DECL_NEW(plcom_fdt, sizeof(struct plcom_softc),
49 	plcom_fdt_match, plcom_fdt_attach, NULL, NULL);
50 
51 static int
52 plcom_fdt_match(device_t parent, cfdata_t cf, void *aux)
53 {
54 	struct fdt_attach_args * const faa = aux;
55 
56 	return of_compatible(faa->faa_phandle, compatible) >= 0;
57 }
58 
59 static void
60 plcom_fdt_attach(device_t parent, device_t self, void *aux)
61 {
62 	struct plcom_softc * const sc = device_private(self);
63 	struct fdt_attach_args * const faa = aux;
64 	const int phandle = faa->faa_phandle;
65 	char intrstr[128];
66 	struct clk *clk;
67 	bus_addr_t addr;
68 	bus_size_t size;
69 	void *ih;
70 
71 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
72 		aprint_error(": missing 'reg' property\n");
73 		return;
74 	}
75 
76 	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
77 		aprint_error(": failed to decode interrupt\n");
78 		return;
79 	}
80 
81 	sc->sc_dev = self;
82 
83 	/* Enable clocks */
84 	for (int i = 0; (clk = fdtbus_clock_get_index(phandle, i)); i++) {
85 		if (clk_enable(clk) != 0) {
86 			aprint_error(": failed to enable clock #%d\n", i);
87 			return;
88 		}
89 		/* First clock is UARTCLK */
90 		if (i == 0)
91 			sc->sc_frequency = clk_get_rate(clk);
92 	}
93 
94 	sc->sc_hwflags = PLCOM_HW_TXFIFO_DISABLE;
95 	sc->sc_swflags = 0;
96 
97 	sc->sc_pi.pi_type = PLCOM_TYPE_PL011;
98 	sc->sc_pi.pi_flags = PLC_FLAG_32BIT_ACCESS;
99 	sc->sc_pi.pi_iot = faa->faa_bst;
100 	sc->sc_pi.pi_iobase = addr;
101 	if (bus_space_map(faa->faa_bst, addr, size, 0, &sc->sc_pi.pi_ioh)) {
102 		aprint_error(": couldn't map device\n");
103 		return;
104 	}
105 
106 	aprint_naive("\n");
107 	aprint_normal(": ARM PL011 UART\n");
108 
109 	plcom_attach_subr(sc);
110 
111 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
112 
113 	ih = fdtbus_intr_establish(phandle, 0, IPL_SERIAL, FDT_INTR_MPSAFE,
114 	    plcomintr, sc);
115 	if (ih == NULL) {
116 		aprint_error_dev(self, "couldn't install interrupt handler\n");
117 		return;
118 	}
119 }
120 
121 static int
122 plcom_fdt_console_match(int phandle)
123 {
124 	return of_match_compatible(phandle, compatible);
125 }
126 
127 static void
128 plcom_fdt_console_consinit(struct fdt_attach_args *faa, u_int uart_freq)
129 {
130 	static struct plcom_instance pi;
131 	bus_addr_t addr;
132 	bus_size_t size;
133 	tcflag_t flags;
134 	int speed;
135 
136 	if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0)
137 		return;
138 
139 	pi.pi_type = PLCOM_TYPE_PL011;
140 	pi.pi_flags = PLC_FLAG_32BIT_ACCESS;
141 	pi.pi_iot = faa->faa_bst;
142 	pi.pi_iobase = addr;
143 	pi.pi_size = size;
144 
145 	speed = fdtbus_get_stdout_speed();
146 	if (speed < 0)
147 		speed = 115200;
148 	flags = fdtbus_get_stdout_flags();
149 
150 	plcomcnattach(&pi, speed, uart_freq, flags, -1);
151 }
152 
153 static const struct fdt_console plcom_fdt_console = {
154 	.match = plcom_fdt_console_match,
155 	.consinit = plcom_fdt_console_consinit,
156 };
157 
158 FDT_CONSOLE(plcom_fdt, &plcom_fdt_console);
159