xref: /netbsd-src/sys/arch/arm/fdt/plcom_fdt.c (revision 82d56013d7b633d116a93943de88e08335357a7c)
1 /* $NetBSD: plcom_fdt.c,v 1.5 2021/01/27 03:10:19 thorpej Exp $ */
2 
3 /*-
4  * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: plcom_fdt.c,v 1.5 2021/01/27 03:10:19 thorpej Exp $");
31 
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/device.h>
35 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 
38 #include <dev/fdt/fdtvar.h>
39 
40 #include <evbarm/dev/plcomreg.h>
41 #include <evbarm/dev/plcomvar.h>
42 
43 static int	plcom_fdt_match(device_t, cfdata_t, void *);
44 static void	plcom_fdt_attach(device_t, device_t, void *);
45 
46 static const struct device_compatible_entry compat_data[] = {
47 	{ .compat = "arm,pl011" },
48 	DEVICE_COMPAT_EOL
49 };
50 
51 CFATTACH_DECL_NEW(plcom_fdt, sizeof(struct plcom_softc),
52 	plcom_fdt_match, plcom_fdt_attach, NULL, NULL);
53 
54 static int
55 plcom_fdt_match(device_t parent, cfdata_t cf, void *aux)
56 {
57 	struct fdt_attach_args * const faa = aux;
58 
59 	return of_compatible_match(faa->faa_phandle, compat_data);
60 }
61 
62 static void
63 plcom_fdt_attach(device_t parent, device_t self, void *aux)
64 {
65 	struct plcom_softc * const sc = device_private(self);
66 	struct fdt_attach_args * const faa = aux;
67 	const int phandle = faa->faa_phandle;
68 	char intrstr[128];
69 	struct clk *clk;
70 	bus_addr_t addr;
71 	bus_size_t size;
72 	void *ih;
73 
74 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
75 		aprint_error(": missing 'reg' property\n");
76 		return;
77 	}
78 
79 	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
80 		aprint_error(": failed to decode interrupt\n");
81 		return;
82 	}
83 
84 	sc->sc_dev = self;
85 
86 	/* Enable clocks */
87 	for (int i = 0; (clk = fdtbus_clock_get_index(phandle, i)); i++) {
88 		if (clk_enable(clk) != 0) {
89 			aprint_error(": failed to enable clock #%d\n", i);
90 			return;
91 		}
92 		/* First clock is UARTCLK */
93 		if (i == 0)
94 			sc->sc_frequency = clk_get_rate(clk);
95 	}
96 
97 	sc->sc_hwflags = PLCOM_HW_TXFIFO_DISABLE;
98 	sc->sc_swflags = 0;
99 
100 	sc->sc_pi.pi_type = PLCOM_TYPE_PL011;
101 	sc->sc_pi.pi_flags = PLC_FLAG_32BIT_ACCESS;
102 	sc->sc_pi.pi_iot = faa->faa_bst;
103 	sc->sc_pi.pi_iobase = addr;
104 	if (bus_space_map(faa->faa_bst, addr, size, 0, &sc->sc_pi.pi_ioh)) {
105 		aprint_error(": couldn't map device\n");
106 		return;
107 	}
108 
109 	aprint_naive("\n");
110 	aprint_normal(": ARM PL011 UART\n");
111 
112 	plcom_attach_subr(sc);
113 
114 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
115 
116 	ih = fdtbus_intr_establish_xname(phandle, 0, IPL_SERIAL, FDT_INTR_MPSAFE,
117 	    plcomintr, sc, device_xname(self));
118 	if (ih == NULL) {
119 		aprint_error_dev(self, "couldn't install interrupt handler\n");
120 		return;
121 	}
122 }
123 
124 static int
125 plcom_fdt_console_match(int phandle)
126 {
127 	return of_compatible_match(phandle, compat_data);
128 }
129 
130 static void
131 plcom_fdt_console_consinit(struct fdt_attach_args *faa, u_int uart_freq)
132 {
133 	static struct plcom_instance pi;
134 	bus_addr_t addr;
135 	bus_size_t size;
136 	tcflag_t flags;
137 	int speed;
138 
139 	if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0)
140 		return;
141 
142 	pi.pi_type = PLCOM_TYPE_PL011;
143 	pi.pi_flags = PLC_FLAG_32BIT_ACCESS;
144 	pi.pi_iot = faa->faa_bst;
145 	pi.pi_iobase = addr;
146 	pi.pi_size = size;
147 
148 	speed = fdtbus_get_stdout_speed();
149 	if (speed < 0)
150 		speed = 115200;
151 	flags = fdtbus_get_stdout_flags();
152 
153 	plcomcnattach(&pi, speed, uart_freq, flags, -1);
154 }
155 
156 static const struct fdt_console plcom_fdt_console = {
157 	.match = plcom_fdt_console_match,
158 	.consinit = plcom_fdt_console_consinit,
159 };
160 
161 FDT_CONSOLE(plcom_fdt, &plcom_fdt_console);
162