xref: /netbsd-src/sys/arch/arm/fdt/gic_fdt.c (revision a24efa7dea9f1f56c3bdb15a927d3516792ace1c)
1 /* $NetBSD: gic_fdt.c,v 1.2 2016/01/05 21:53:48 marty Exp $ */
2 
3 /*-
4  * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: gic_fdt.c,v 1.2 2016/01/05 21:53:48 marty Exp $");
31 
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/device.h>
35 #include <sys/intr.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/kmem.h>
39 
40 #include <arm/cortex/gic_intr.h>
41 
42 #include <dev/fdt/fdtvar.h>
43 
44 static int	gic_fdt_match(device_t, cfdata_t, void *);
45 static void	gic_fdt_attach(device_t, device_t, void *);
46 
47 static void *	gic_fdt_establish(device_t, u_int *, int, int,
48 		    int (*)(void *), void *);
49 static void	gic_fdt_disestablish(device_t, void *);
50 static bool	gic_fdt_intrstr(device_t, u_int *, char *, size_t);
51 
52 struct fdtbus_interrupt_controller_func gic_fdt_funcs = {
53 	.establish = gic_fdt_establish,
54 	.disestablish = gic_fdt_disestablish,
55 	.intrstr = gic_fdt_intrstr
56 };
57 
58 struct gic_fdt_softc {
59 	device_t		sc_dev;
60 	int			sc_phandle;
61 };
62 
63 CFATTACH_DECL_NEW(gic_fdt, sizeof(struct gic_fdt_softc),
64 	gic_fdt_match, gic_fdt_attach, NULL, NULL);
65 
66 static int
67 gic_fdt_match(device_t parent, cfdata_t cf, void *aux)
68 {
69 	const char * const compatible[] = {
70 		"arm,gic-400",
71 		"arm,cortex-a15-gic",
72 		"arm,cortex-a9-gic",
73 		"arm,cortex-a7-gic",
74 		NULL
75 	};
76 	struct fdt_attach_args * const faa = aux;
77 
78 	return of_compatible(faa->faa_phandle, compatible) >= 0;
79 }
80 
81 static void
82 gic_fdt_attach(device_t parent, device_t self, void *aux)
83 {
84 	struct gic_fdt_softc * const sc = device_private(self);
85 	struct fdt_attach_args * const faa = aux;
86 	int error;
87 
88 	sc->sc_dev = self;
89 	sc->sc_phandle = faa->faa_phandle;
90 
91 	error = fdtbus_register_interrupt_controller(self, faa->faa_phandle,
92 	    &gic_fdt_funcs);
93 	if (error) {
94 		aprint_error(": couldn't register with fdtbus: %d\n", error);
95 		return;
96 	}
97 
98 	aprint_naive("\n");
99 	aprint_normal(": GIC\n");
100 }
101 
102 static void *
103 gic_fdt_establish(device_t dev, u_int *specifier, int ipl, int flags,
104     int (*func)(void *), void *arg)
105 {
106 	int iflags = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;
107 
108 	/* 1st cell is the interrupt type; 0 is SPI, 1 is PPI */
109 	/* 2nd cell is the interrupt number */
110 	/* 3rd cell is flags */
111 
112 	const u_int type = be32toh(specifier[0]);
113 	const u_int intr = be32toh(specifier[1]);
114 	const u_int irq = type == 0 ? IRQ_SPI(intr) : IRQ_PPI(intr);
115 	const u_int trig = be32toh(specifier[2]) & 0xf;
116 	const u_int level = (trig & 0x3) ? IST_EDGE : IST_LEVEL;
117 
118 	return intr_establish(irq, ipl, level | iflags, func, arg);
119 }
120 
121 static void
122 gic_fdt_disestablish(device_t dev, void *ih)
123 {
124 	intr_disestablish(ih);
125 }
126 
127 static bool
128 gic_fdt_intrstr(device_t dev, u_int *specifier, char *buf, size_t buflen)
129 {
130 	/* 1st cell is the interrupt type; 0 is SPI, 1 is PPI */
131 	/* 2nd cell is the interrupt number */
132 	/* 3rd cell is flags */
133 
134 	if (!specifier)
135 		return false;
136 	const u_int type = be32toh(specifier[0]);
137 	const u_int intr = be32toh(specifier[1]);
138 	const u_int irq = type == 0 ? IRQ_SPI(intr) : IRQ_PPI(intr);
139 
140 	snprintf(buf, buflen, "GIC irq %d", irq);
141 
142 	return true;
143 }
144