xref: /netbsd-src/sys/arch/arm/fdt/cpu_fdt.c (revision c38e7cc395b1472a774ff828e46123de44c628e9)
1 /* $NetBSD: cpu_fdt.c,v 1.5 2018/04/01 04:35:04 ryo Exp $ */
2 
3 /*-
4  * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: cpu_fdt.c,v 1.5 2018/04/01 04:35:04 ryo Exp $");
31 
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/device.h>
35 #include <sys/lwp.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 
39 #include <dev/fdt/fdtvar.h>
40 
41 #include <arm/armreg.h>
42 #include <arm/cpu.h>
43 #include <arm/cpufunc.h>
44 
45 static int	cpu_fdt_match(device_t, cfdata_t, void *);
46 static void	cpu_fdt_attach(device_t, device_t, void *);
47 
48 enum cpu_fdt_type {
49 	ARM_CPU_UP = 1,
50 	ARM_CPU_ARMV7,
51 	ARM_CPU_ARMV8,
52 };
53 
54 struct cpu_fdt_softc {
55 	device_t		sc_dev;
56 	int			sc_phandle;
57 };
58 
59 static const struct of_compat_data compat_data[] = {
60 	{ "arm,arm1176jzf-s",		ARM_CPU_UP },
61 
62 	{ "arm,cortex-a5",		ARM_CPU_ARMV7 },
63 	{ "arm,cortex-a7",		ARM_CPU_ARMV7 },
64 	{ "arm,cortex-a8",		ARM_CPU_ARMV7 },
65 	{ "arm,cortex-a9",		ARM_CPU_ARMV7 },
66 	{ "arm,cortex-a12",		ARM_CPU_ARMV7 },
67 	{ "arm,cortex-a15",		ARM_CPU_ARMV7 },
68 	{ "arm,cortex-a17",		ARM_CPU_ARMV7 },
69 
70 	{ "arm,cortex-a53",		ARM_CPU_ARMV8 },
71 	{ "arm,cortex-a57",		ARM_CPU_ARMV8 },
72 	{ "arm,cortex-a72",		ARM_CPU_ARMV8 },
73 	{ "arm,cortex-a73",		ARM_CPU_ARMV8 },
74 	{ NULL }
75 };
76 
77 CFATTACH_DECL_NEW(cpu_fdt, sizeof(struct cpu_fdt_softc),
78 	cpu_fdt_match, cpu_fdt_attach, NULL, NULL);
79 
80 static int
81 cpu_fdt_match(device_t parent, cfdata_t cf, void *aux)
82 {
83 	struct fdt_attach_args * const faa = aux;
84 	const int phandle = faa->faa_phandle;
85 	enum cpu_fdt_type type;
86 	int is_compatible;
87 	bus_addr_t mpidr;
88 
89 	is_compatible = of_match_compat_data(phandle, compat_data);
90 	if (!is_compatible)
91 		return 0;
92 
93 	type = of_search_compatible(phandle, compat_data)->data;
94 	switch (type) {
95 	case ARM_CPU_ARMV7:
96 	case ARM_CPU_ARMV8:
97 		/* XXX NetBSD requires all CPUs to be in the same cluster */
98 		if (fdtbus_get_reg(phandle, 0, &mpidr, NULL) != 0)
99 			return 0;
100 
101 		const u_int bp_clid = cpu_clusterid();
102 		const u_int clid = __SHIFTOUT(mpidr, MPIDR_AFF1);
103 
104 		if (bp_clid != clid)
105 			return 0;
106 		break;
107 	default:
108 		break;
109 	}
110 
111 	return is_compatible;
112 }
113 
114 static void
115 cpu_fdt_attach(device_t parent, device_t self, void *aux)
116 {
117 	struct cpu_fdt_softc * const sc = device_private(self);
118 	struct fdt_attach_args * const faa = aux;
119 	const int phandle = faa->faa_phandle;
120 	enum cpu_fdt_type type;
121 	bus_addr_t mpidr;
122 	cpuid_t cpuid;
123 
124 	sc->sc_dev = self;
125 	sc->sc_phandle = phandle;
126 
127 	type = of_search_compatible(phandle, compat_data)->data;
128 
129 	switch (type) {
130 	case ARM_CPU_ARMV7:
131 	case ARM_CPU_ARMV8:
132 		if (fdtbus_get_reg(phandle, 0, &mpidr, NULL) != 0) {
133 			aprint_error(": missing 'reg' property\n");
134 			return;
135 		}
136 
137 		cpuid = __SHIFTOUT(mpidr, MPIDR_AFF0);
138 		break;
139 	default:
140 		cpuid = 0;
141 		break;
142 	}
143 
144 	/* Attach the CPU */
145 	cpu_attach(self, cpuid);
146 }
147