xref: /netbsd-src/sys/arch/arm/fdt/arm_fdt.c (revision f3cfa6f6ce31685c6c4a758bc430e69eb99f50a4)
1 /* $NetBSD: arm_fdt.c,v 1.9 2019/01/03 12:54:25 jmcneill Exp $ */
2 
3 /*-
4  * Copyright (c) 2017 Jared D. McNeill <jmcneill@invisible.ca>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include "opt_arm_timer.h"
30 
31 #include <sys/cdefs.h>
32 __KERNEL_RCSID(0, "$NetBSD: arm_fdt.c,v 1.9 2019/01/03 12:54:25 jmcneill Exp $");
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/cpu.h>
37 #include <sys/device.h>
38 #include <sys/kmem.h>
39 #include <sys/bus.h>
40 
41 #include <dev/fdt/fdtvar.h>
42 #include <dev/ofw/openfirm.h>
43 
44 #include <arm/fdt/arm_fdtvar.h>
45 
46 static int	arm_fdt_match(device_t, cfdata_t, void *);
47 static void	arm_fdt_attach(device_t, device_t, void *);
48 
49 CFATTACH_DECL_NEW(arm_fdt, 0,
50     arm_fdt_match, arm_fdt_attach, NULL, NULL);
51 
52 struct arm_fdt_cpu_hatch_cb {
53 	TAILQ_ENTRY(arm_fdt_cpu_hatch_cb) next;
54 	void (*cb)(void *, struct cpu_info *);
55 	void *priv;
56 };
57 
58 static TAILQ_HEAD(, arm_fdt_cpu_hatch_cb) arm_fdt_cpu_hatch_cbs =
59     TAILQ_HEAD_INITIALIZER(arm_fdt_cpu_hatch_cbs);
60 
61 static void (*_arm_fdt_irq_handler)(void *) = NULL;
62 static void (*_arm_fdt_timer_init)(void) = NULL;
63 
64 int
65 arm_fdt_match(device_t parent, cfdata_t cf, void *aux)
66 {
67 	return 1;
68 }
69 
70 void
71 arm_fdt_attach(device_t parent, device_t self, void *aux)
72 {
73 	const struct arm_platform *plat = arm_fdt_platform();
74 	struct fdt_attach_args faa;
75 
76 	aprint_naive("\n");
77 	aprint_normal("\n");
78 
79 	plat->ap_init_attach_args(&faa);
80 	faa.faa_name = "";
81 	faa.faa_phandle = OF_peer(0);
82 
83 	config_found(self, &faa, NULL);
84 }
85 
86 const struct arm_platform *
87 arm_fdt_platform(void)
88 {
89 	static const struct arm_platform_info *booted_platform = NULL;
90 
91 	if (booted_platform == NULL) {
92 		__link_set_decl(arm_platforms, struct arm_platform_info);
93 		struct arm_platform_info * const *info;
94 		const struct arm_platform_info *best_info = NULL;
95 		const int phandle = OF_peer(0);
96 		int match, best_match = 0;
97 
98 		__link_set_foreach(info, arm_platforms) {
99 			const char * const compat[] = { (*info)->api_compat, NULL };
100 			match = of_match_compatible(phandle, compat);
101 			if (match > best_match) {
102 				best_match = match;
103 				best_info = *info;
104 			}
105 		}
106 
107 		booted_platform = best_info;
108 	}
109 
110 	return booted_platform == NULL ? NULL : booted_platform->api_ops;
111 }
112 
113 void
114 arm_fdt_cpu_hatch_register(void *priv, void (*cb)(void *, struct cpu_info *))
115 {
116 	struct arm_fdt_cpu_hatch_cb *c;
117 
118 	c = kmem_alloc(sizeof(*c), KM_SLEEP);
119 	c->priv = priv;
120 	c->cb = cb;
121 	TAILQ_INSERT_TAIL(&arm_fdt_cpu_hatch_cbs, c, next);
122 }
123 
124 void
125 arm_fdt_cpu_hatch(struct cpu_info *ci)
126 {
127 	struct arm_fdt_cpu_hatch_cb *c;
128 
129 	TAILQ_FOREACH(c, &arm_fdt_cpu_hatch_cbs, next)
130 		c->cb(c->priv, ci);
131 }
132 
133 void
134 arm_fdt_irq_set_handler(void (*irq_handler)(void *))
135 {
136 	KASSERT(_arm_fdt_irq_handler == NULL);
137 	_arm_fdt_irq_handler = irq_handler;
138 }
139 
140 void
141 arm_fdt_irq_handler(void *tf)
142 {
143 	_arm_fdt_irq_handler(tf);
144 }
145 
146 void
147 arm_fdt_timer_register(void (*timerfn)(void))
148 {
149 	if (_arm_fdt_timer_init != NULL) {
150 #ifdef DIAGNOSTIC
151 		aprint_verbose("%s: timer already registered\n", __func__);
152 #endif
153 		return;
154 	}
155 	_arm_fdt_timer_init = timerfn;
156 }
157 
158 void
159 arm_fdt_memory_dump(paddr_t pa)
160 {
161 	const struct arm_platform *plat = arm_fdt_platform();
162 	struct fdt_attach_args faa;
163 	bus_space_tag_t bst;
164 	bus_space_handle_t bsh;
165 
166 	plat->ap_init_attach_args(&faa);
167 
168 	bst = faa.faa_bst;
169 	bus_space_map(bst, pa, 0x100, 0, &bsh);
170 
171 	for (int i = 0; i < 0x100; i += 0x10) {
172 		printf("%" PRIxPTR ": %08x %08x %08x %08x\n",
173 		    (uintptr_t)(pa + i),
174 		    bus_space_read_4(bst, bsh, i + 0),
175 		    bus_space_read_4(bst, bsh, i + 4),
176 		    bus_space_read_4(bst, bsh, i + 8),
177 		    bus_space_read_4(bst, bsh, i + 12));
178 	}
179 }
180 
181 #ifdef __HAVE_GENERIC_CPU_INITCLOCKS
182 void
183 cpu_initclocks(void)
184 {
185 	if (_arm_fdt_timer_init == NULL)
186 		panic("cpu_initclocks: no timer registered");
187 	_arm_fdt_timer_init();
188 }
189 #endif
190