xref: /netbsd-src/sys/arch/arm/fdt/arm_fdt.c (revision e6c7e151de239c49d2e38720a061ed9d1fa99309)
1 /* $NetBSD: arm_fdt.c,v 1.10 2020/01/05 17:16:07 jmcneill Exp $ */
2 
3 /*-
4  * Copyright (c) 2017 Jared D. McNeill <jmcneill@invisible.ca>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include "opt_arm_timer.h"
30 
31 #include <sys/cdefs.h>
32 __KERNEL_RCSID(0, "$NetBSD: arm_fdt.c,v 1.10 2020/01/05 17:16:07 jmcneill Exp $");
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/cpu.h>
37 #include <sys/device.h>
38 #include <sys/kmem.h>
39 #include <sys/bus.h>
40 
41 #include <dev/fdt/fdtvar.h>
42 #include <dev/ofw/openfirm.h>
43 
44 #include <arm/fdt/arm_fdtvar.h>
45 
46 static int	arm_fdt_match(device_t, cfdata_t, void *);
47 static void	arm_fdt_attach(device_t, device_t, void *);
48 
49 CFATTACH_DECL_NEW(arm_fdt, 0,
50     arm_fdt_match, arm_fdt_attach, NULL, NULL);
51 
52 struct arm_fdt_cpu_hatch_cb {
53 	TAILQ_ENTRY(arm_fdt_cpu_hatch_cb) next;
54 	void (*cb)(void *, struct cpu_info *);
55 	void *priv;
56 };
57 
58 static TAILQ_HEAD(, arm_fdt_cpu_hatch_cb) arm_fdt_cpu_hatch_cbs =
59     TAILQ_HEAD_INITIALIZER(arm_fdt_cpu_hatch_cbs);
60 
61 static void (*_arm_fdt_irq_handler)(void *) = NULL;
62 static void (*_arm_fdt_timer_init)(void) = NULL;
63 
64 int
65 arm_fdt_match(device_t parent, cfdata_t cf, void *aux)
66 {
67 	return 1;
68 }
69 
70 void
71 arm_fdt_attach(device_t parent, device_t self, void *aux)
72 {
73 	const struct arm_platform *plat = arm_fdt_platform();
74 	struct fdt_attach_args faa;
75 
76 	aprint_naive("\n");
77 	aprint_normal("\n");
78 
79 	plat->ap_init_attach_args(&faa);
80 	faa.faa_name = "";
81 	faa.faa_phandle = OF_peer(0);
82 
83 	config_found(self, &faa, NULL);
84 }
85 
86 const struct arm_platform *
87 arm_fdt_platform(void)
88 {
89 	static const struct arm_platform_info *booted_platform = NULL;
90 	__link_set_decl(arm_platforms, struct arm_platform_info);
91 	struct arm_platform_info * const *info;
92 
93 	if (booted_platform == NULL) {
94 		const struct arm_platform_info *best_info = NULL;
95 		const int phandle = OF_peer(0);
96 		int match, best_match = 0;
97 
98 		__link_set_foreach(info, arm_platforms) {
99 			const char * const compat[] = { (*info)->api_compat, NULL };
100 			match = of_match_compatible(phandle, compat);
101 			if (match > best_match) {
102 				best_match = match;
103 				best_info = *info;
104 			}
105 		}
106 
107 		booted_platform = best_info;
108 	}
109 
110 	/*
111 	 * No SoC specific platform was found. Try to find a generic
112 	 * platform definition and use that if available.
113 	 */
114 	if (booted_platform == NULL) {
115 		__link_set_foreach(info, arm_platforms) {
116 			if (strcmp((*info)->api_compat, ARM_PLATFORM_DEFAULT) == 0) {
117 				booted_platform = *info;
118 				break;
119 			}
120 		}
121 	}
122 
123 	return booted_platform == NULL ? NULL : booted_platform->api_ops;
124 }
125 
126 void
127 arm_fdt_cpu_hatch_register(void *priv, void (*cb)(void *, struct cpu_info *))
128 {
129 	struct arm_fdt_cpu_hatch_cb *c;
130 
131 	c = kmem_alloc(sizeof(*c), KM_SLEEP);
132 	c->priv = priv;
133 	c->cb = cb;
134 	TAILQ_INSERT_TAIL(&arm_fdt_cpu_hatch_cbs, c, next);
135 }
136 
137 void
138 arm_fdt_cpu_hatch(struct cpu_info *ci)
139 {
140 	struct arm_fdt_cpu_hatch_cb *c;
141 
142 	TAILQ_FOREACH(c, &arm_fdt_cpu_hatch_cbs, next)
143 		c->cb(c->priv, ci);
144 }
145 
146 void
147 arm_fdt_irq_set_handler(void (*irq_handler)(void *))
148 {
149 	KASSERT(_arm_fdt_irq_handler == NULL);
150 	_arm_fdt_irq_handler = irq_handler;
151 }
152 
153 void
154 arm_fdt_irq_handler(void *tf)
155 {
156 	_arm_fdt_irq_handler(tf);
157 }
158 
159 void
160 arm_fdt_timer_register(void (*timerfn)(void))
161 {
162 	if (_arm_fdt_timer_init != NULL) {
163 #ifdef DIAGNOSTIC
164 		aprint_verbose("%s: timer already registered\n", __func__);
165 #endif
166 		return;
167 	}
168 	_arm_fdt_timer_init = timerfn;
169 }
170 
171 void
172 arm_fdt_memory_dump(paddr_t pa)
173 {
174 	const struct arm_platform *plat = arm_fdt_platform();
175 	struct fdt_attach_args faa;
176 	bus_space_tag_t bst;
177 	bus_space_handle_t bsh;
178 
179 	plat->ap_init_attach_args(&faa);
180 
181 	bst = faa.faa_bst;
182 	bus_space_map(bst, pa, 0x100, 0, &bsh);
183 
184 	for (int i = 0; i < 0x100; i += 0x10) {
185 		printf("%" PRIxPTR ": %08x %08x %08x %08x\n",
186 		    (uintptr_t)(pa + i),
187 		    bus_space_read_4(bst, bsh, i + 0),
188 		    bus_space_read_4(bst, bsh, i + 4),
189 		    bus_space_read_4(bst, bsh, i + 8),
190 		    bus_space_read_4(bst, bsh, i + 12));
191 	}
192 }
193 
194 #ifdef __HAVE_GENERIC_CPU_INITCLOCKS
195 void
196 cpu_initclocks(void)
197 {
198 	if (_arm_fdt_timer_init == NULL)
199 		panic("cpu_initclocks: no timer registered");
200 	_arm_fdt_timer_init();
201 }
202 #endif
203