1 /* $NetBSD: a9tmr_fdt.c,v 1.6 2021/04/24 23:36:26 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: a9tmr_fdt.c,v 1.6 2021/04/24 23:36:26 thorpej Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/device.h> 35 #include <sys/intr.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/kmem.h> 39 40 #include <arm/cortex/a9tmr_intr.h> 41 #include <arm/cortex/mpcore_var.h> 42 #include <arm/cortex/a9tmr_var.h> 43 44 #include <dev/fdt/fdtvar.h> 45 #include <arm/fdt/arm_fdtvar.h> 46 47 static int a9tmr_fdt_match(device_t, cfdata_t, void *); 48 static void a9tmr_fdt_attach(device_t, device_t, void *); 49 50 static void a9tmr_fdt_cpu_hatch(void *, struct cpu_info *); 51 static void a9tmr_fdt_speed_changed(device_t); 52 53 struct a9tmr_fdt_softc { 54 device_t sc_dev; 55 struct clk *sc_clk; 56 }; 57 58 CFATTACH_DECL_NEW(a9tmr_fdt, sizeof(struct a9tmr_fdt_softc), 59 a9tmr_fdt_match, a9tmr_fdt_attach, NULL, NULL); 60 61 static const struct device_compatible_entry compat_data[] = { 62 { .compat = "arm,cortex-a5-global-timer" }, 63 { .compat = "arm,cortex-a9-global-timer" }, 64 DEVICE_COMPAT_EOL 65 }; 66 67 static int 68 a9tmr_fdt_match(device_t parent, cfdata_t cf, void *aux) 69 { 70 struct fdt_attach_args * const faa = aux; 71 72 return of_compatible_match(faa->faa_phandle, compat_data); 73 } 74 75 static void 76 a9tmr_fdt_attach(device_t parent, device_t self, void *aux) 77 { 78 struct a9tmr_fdt_softc * const sc = device_private(self); 79 struct fdt_attach_args * const faa = aux; 80 const int phandle = faa->faa_phandle; 81 bus_space_handle_t bsh; 82 83 sc->sc_dev = self; 84 sc->sc_clk = fdtbus_clock_get_index(phandle, 0); 85 if (sc->sc_clk == NULL) { 86 aprint_error(": couldn't get clock\n"); 87 return; 88 } 89 if (clk_enable(sc->sc_clk) != 0) { 90 aprint_error(": couldn't enable clock\n"); 91 return; 92 } 93 94 uint32_t rate = clk_get_rate(sc->sc_clk); 95 prop_dictionary_t dict = device_properties(self); 96 prop_dictionary_set_uint32(dict, "frequency", rate); 97 98 char intrstr[128]; 99 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 100 aprint_error(": failed to decode interrupt\n"); 101 return; 102 } 103 104 aprint_naive("\n"); 105 aprint_normal("\n"); 106 107 void *ih = fdtbus_intr_establish_xname(phandle, 0, IPL_CLOCK, 108 FDT_INTR_MPSAFE, a9tmr_intr, NULL, device_xname(self)); 109 if (ih == NULL) { 110 aprint_error_dev(self, "couldn't install interrupt handler\n"); 111 return; 112 } 113 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 114 115 bus_addr_t addr; 116 bus_size_t size; 117 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 118 aprint_error(": couldn't get distributor address\n"); 119 return; 120 } 121 if (bus_space_map(faa->faa_bst, addr, size, 0, &bsh)) { 122 aprint_error(": couldn't map registers\n"); 123 return; 124 } 125 126 struct mpcore_attach_args mpcaa = { 127 .mpcaa_name = "arma9tmr", 128 .mpcaa_memt = faa->faa_bst, 129 .mpcaa_memh = bsh, 130 .mpcaa_irq = -1, 131 }; 132 133 config_found(self, &mpcaa, NULL, CFARG_EOL); 134 135 arm_fdt_cpu_hatch_register(self, a9tmr_fdt_cpu_hatch); 136 arm_fdt_timer_register(a9tmr_cpu_initclocks); 137 138 pmf_event_register(self, PMFE_SPEED_CHANGED, a9tmr_fdt_speed_changed, true); 139 } 140 141 static void 142 a9tmr_fdt_cpu_hatch(void *priv, struct cpu_info *ci) 143 { 144 a9tmr_init_cpu_clock(ci); 145 } 146 147 static void 148 a9tmr_fdt_speed_changed(device_t dev) 149 { 150 struct a9tmr_fdt_softc * const sc = device_private(dev); 151 prop_dictionary_t dict = device_properties(dev); 152 uint32_t rate; 153 154 rate = clk_get_rate(sc->sc_clk); 155 prop_dictionary_set_uint32(dict, "frequency", rate); 156 157 a9tmr_update_freq(rate); 158 } 159