xref: /netbsd-src/sys/arch/arm/fdt/a9tmr_fdt.c (revision 181254a7b1bdde6873432bffef2d2decc4b5c22f)
1 /* $NetBSD: a9tmr_fdt.c,v 1.3 2019/01/22 15:17:33 jmcneill Exp $ */
2 
3 /*-
4  * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: a9tmr_fdt.c,v 1.3 2019/01/22 15:17:33 jmcneill Exp $");
31 
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/device.h>
35 #include <sys/intr.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/kmem.h>
39 
40 #include <arm/cortex/a9tmr_intr.h>
41 #include <arm/cortex/mpcore_var.h>
42 #include <arm/cortex/a9tmr_var.h>
43 
44 #include <dev/fdt/fdtvar.h>
45 #include <arm/fdt/arm_fdtvar.h>
46 
47 static int	a9tmr_fdt_match(device_t, cfdata_t, void *);
48 static void	a9tmr_fdt_attach(device_t, device_t, void *);
49 
50 static void	a9tmr_fdt_cpu_hatch(void *, struct cpu_info *);
51 static void	a9tmr_fdt_speed_changed(device_t);
52 
53 struct a9tmr_fdt_softc {
54 	device_t	sc_dev;
55 	struct clk	*sc_clk;
56 };
57 
58 CFATTACH_DECL_NEW(a9tmr_fdt, sizeof(struct a9tmr_fdt_softc),
59     a9tmr_fdt_match, a9tmr_fdt_attach, NULL, NULL);
60 
61 static int
62 a9tmr_fdt_match(device_t parent, cfdata_t cf, void *aux)
63 {
64 	const char * const compatible[] = {
65 		"arm,cortex-a5-global-timer",
66 		"arm,cortex-a9-global-timer",
67 		NULL
68 	};
69 	struct fdt_attach_args * const faa = aux;
70 
71 	return of_compatible(faa->faa_phandle, compatible) >= 0;
72 }
73 
74 static void
75 a9tmr_fdt_attach(device_t parent, device_t self, void *aux)
76 {
77 	struct a9tmr_fdt_softc * const sc = device_private(self);
78 	struct fdt_attach_args * const faa = aux;
79 	const int phandle = faa->faa_phandle;
80 	bus_space_handle_t bsh;
81 
82 	sc->sc_dev = self;
83 	sc->sc_clk = fdtbus_clock_get_index(phandle, 0);
84 	if (sc->sc_clk == NULL) {
85 		aprint_error(": couldn't get clock\n");
86 		return;
87 	}
88 	if (clk_enable(sc->sc_clk) != 0) {
89 		aprint_error(": couldn't enable clock\n");
90 		return;
91 	}
92 
93 	uint32_t rate = clk_get_rate(sc->sc_clk);
94 	prop_dictionary_t dict = device_properties(self);
95 	prop_dictionary_set_uint32(dict, "frequency", rate);
96 
97 	char intrstr[128];
98 	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
99 		aprint_error(": failed to decode interrupt\n");
100 		return;
101 	}
102 
103 	aprint_naive("\n");
104 	aprint_normal("\n");
105 
106 	void *ih = fdtbus_intr_establish(phandle, 0, IPL_CLOCK,
107 	    FDT_INTR_MPSAFE, a9tmr_intr, NULL);
108 	if (ih == NULL) {
109 		aprint_error_dev(self, "couldn't install interrupt handler\n");
110 		return;
111 	}
112 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
113 
114 	bus_addr_t addr;
115 	bus_size_t size;
116 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
117 		aprint_error(": couldn't get distributor address\n");
118 		return;
119 	}
120 	if (bus_space_map(faa->faa_bst, addr, size, 0, &bsh)) {
121 		aprint_error(": couldn't map registers\n");
122 		return;
123 	}
124 
125 	struct mpcore_attach_args mpcaa = {
126 		.mpcaa_name = "arma9tmr",
127 		.mpcaa_memt = faa->faa_bst,
128 		.mpcaa_memh = bsh,
129 		.mpcaa_irq = -1,
130 	};
131 
132 	config_found(self, &mpcaa, NULL);
133 
134 	arm_fdt_cpu_hatch_register(self, a9tmr_fdt_cpu_hatch);
135 	arm_fdt_timer_register(a9tmr_cpu_initclocks);
136 
137 	pmf_event_register(self, PMFE_SPEED_CHANGED, a9tmr_fdt_speed_changed, true);
138 }
139 
140 static void
141 a9tmr_fdt_cpu_hatch(void *priv, struct cpu_info *ci)
142 {
143 	a9tmr_init_cpu_clock(ci);
144 }
145 
146 static void
147 a9tmr_fdt_speed_changed(device_t dev)
148 {
149 	struct a9tmr_fdt_softc * const sc = device_private(dev);
150 	prop_dictionary_t dict = device_properties(dev);
151 	uint32_t rate;
152 
153 	rate = clk_get_rate(sc->sc_clk);
154 	prop_dictionary_set_uint32(dict, "frequency", rate);
155 
156 	a9tmr_update_freq(rate);
157 }
158