1 /* $NetBSD: eppcic.c,v 1.6 2011/07/26 22:52:47 dyoung Exp $ */ 2 3 /* 4 * Copyright (c) 2005 HAMAJIMA Katsuomi. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __KERNEL_RCSID(0, "$NetBSD: eppcic.c,v 1.6 2011/07/26 22:52:47 dyoung Exp $"); 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/malloc.h> 35 #include <sys/device.h> 36 #include <sys/kthread.h> 37 #include <uvm/uvm_param.h> 38 #include <sys/bus.h> 39 #include <dev/pcmcia/pcmciareg.h> 40 #include <dev/pcmcia/pcmciavar.h> 41 #include <dev/pcmcia/pcmciachip.h> 42 #include <arm/ep93xx/epsocvar.h> 43 #include <arm/ep93xx/epgpiovar.h> 44 #include <arm/ep93xx/eppcicvar.h> 45 #include <arm/ep93xx/ep93xxreg.h> 46 #include <arm/ep93xx/epsmcreg.h> 47 #include "epled.h" 48 #if NEPLED > 0 49 #include <arm/ep93xx/epledvar.h> 50 #endif 51 52 #include "epgpio.h" 53 #if NEPGPIO == 0 54 #error "epgpio requires in eppcic" 55 #endif 56 57 #ifdef EPPCIC_DEBUG 58 int eppcic_debug = EPPCIC_DEBUG; 59 #define DPRINTFN(n,x) if (eppcic_debug>(n)) printf x; 60 #else 61 #define DPRINTFN(n,x) 62 #endif 63 64 /* Mem & I/O */ 65 #define SOCKET0_MCCD1 1 /* pin36/pin26 (negative) Card Detect 1 */ 66 #define SOCKET0_MCCD2 2 /* pin67/pin25 (negative) Card Detect 2 */ 67 #define SOCKET0_VS1 5 /* pin33/pin43 (negative) Voltage Sense 1 */ 68 #define SOCKET0_VS2 7 /* pin57/pin40 (negative) Voltage Sense 2 */ 69 /* Memory */ 70 #define SOCKET0_WP 0 /* pin33/pin24 Write Protect */ 71 #define SOCKET0_MCBVD1 3 /* pin63/pin46 Battery Voltage Detect 1 */ 72 #define SOCKET0_MCBVD2 4 /* pin62/pin45 Battery Voltage Detect 2 */ 73 #define SOCKET0_READY 6 /* pin16/pin37 Ready */ 74 /* I/O */ 75 #define SOCKET0_STSCHG 3 /* pin63/pin46 (negative) Status Change */ 76 #define SOCKET0_SPKR 4 /* pin62/pin45 (negative) Speaker */ 77 #define SOCKET0_IREQ 6 /* pin16/pin37 Interrupt Request */ 78 79 struct eppcic_handle { 80 int ph_socket; /* socket number */ 81 struct eppcic_softc *ph_sc; 82 struct device *ph_card; 83 int (*ph_ih_func)(void *); 84 void *ph_ih_arg; 85 lwp_t *ph_event_thread; 86 int ph_run; /* ktread running */ 87 int ph_width; /* 8 or 16 */ 88 int ph_vcc; /* 3 or 5 */ 89 int ph_status[2]; /* cd1 and cd2 */ 90 int ph_port; /* GPIO port */ 91 int ph_cd[2]; /* card detect */ 92 int ph_vs[2]; /* voltage sense */ 93 int ph_ireq; /* interrupt request */ 94 struct { 95 bus_size_t reg; 96 bus_addr_t base; 97 bus_size_t size; 98 } ph_space[3]; 99 #define IO 0 100 #define COMMON 1 101 #define ATTRIBUTE 2 102 }; 103 104 static int eppcic_intr_carddetect(void *); 105 static int eppcic_intr_socket(void *); 106 static int eppcic_print(void *, const char *); 107 static void eppcic_event_thread(void *); 108 void eppcic_shutdown(void *); 109 110 static int eppcic_mem_alloc(pcmcia_chipset_handle_t, bus_size_t, 111 struct pcmcia_mem_handle *); 112 static void eppcic_mem_free(pcmcia_chipset_handle_t, 113 struct pcmcia_mem_handle *); 114 static int eppcic_mem_map(pcmcia_chipset_handle_t, int, bus_addr_t, bus_size_t, 115 struct pcmcia_mem_handle *, bus_size_t *, int *); 116 static void eppcic_mem_unmap(pcmcia_chipset_handle_t, int); 117 static int eppcic_io_alloc(pcmcia_chipset_handle_t, bus_addr_t, bus_size_t, 118 bus_size_t, struct pcmcia_io_handle *); 119 static void eppcic_io_free(pcmcia_chipset_handle_t, struct pcmcia_io_handle *); 120 static int eppcic_io_map(pcmcia_chipset_handle_t, int, bus_addr_t, bus_size_t, 121 struct pcmcia_io_handle *, int *); 122 static void eppcic_io_unmap(pcmcia_chipset_handle_t, int); 123 static void *eppcic_intr_establish(pcmcia_chipset_handle_t, 124 struct pcmcia_function *, 125 int, int (*)(void *), void *); 126 static void eppcic_intr_disestablish(pcmcia_chipset_handle_t, void *); 127 static void eppcic_socket_enable(pcmcia_chipset_handle_t); 128 static void eppcic_socket_disable(pcmcia_chipset_handle_t); 129 static void eppcic_socket_settype(pcmcia_chipset_handle_t, int); 130 131 static void eppcic_attach_socket(struct eppcic_handle *); 132 static void eppcic_config_socket(struct eppcic_handle *); 133 static int eppcic_get_voltage(struct eppcic_handle *); 134 static void eppcic_set_pcreg(struct eppcic_handle *, int); 135 136 static struct pcmcia_chip_functions eppcic_functions = { 137 eppcic_mem_alloc, eppcic_mem_free, 138 eppcic_mem_map, eppcic_mem_unmap, 139 eppcic_io_alloc, eppcic_io_free, 140 eppcic_io_map, eppcic_io_unmap, 141 eppcic_intr_establish, eppcic_intr_disestablish, 142 eppcic_socket_enable, eppcic_socket_disable, 143 eppcic_socket_settype 144 }; 145 146 void 147 eppcic_attach_common(struct device *parent, struct device *self, void *aux, 148 eppcic_chipset_tag_t pcic) 149 { 150 struct eppcic_softc *sc = (struct eppcic_softc *)self; 151 struct epsoc_attach_args *sa = aux; 152 struct eppcic_handle *ph; 153 int reg; 154 int i; 155 156 if (!sa->sa_gpio) { 157 printf("%s: epgpio requires\n", self->dv_xname); 158 return; 159 } 160 sc->sc_gpio = sa->sa_gpio; 161 sc->sc_iot = sa->sa_iot; 162 sc->sc_hclk = sa->sa_hclk; 163 sc->sc_pcic = pcic; 164 sc->sc_enable = 0; 165 if (bus_space_map(sa->sa_iot, sa->sa_addr, 166 sa->sa_size, 0, &sc->sc_ioh)){ 167 printf("%s: Cannot map registers\n", self->dv_xname); 168 return; 169 } 170 printf("\n"); 171 172 #if NEPLED > 0 173 epled_green_on(); 174 epled_red_off(); 175 #endif 176 /* socket 0 */ 177 if (!(ph = malloc(sizeof(struct eppcic_handle), M_DEVBUF, M_NOWAIT))) { 178 printf("%s: Cannot allocate memory\n", self->dv_xname); 179 return; /* ENOMEM */ 180 } 181 sc->sc_ph[0] = ph; 182 ph->ph_sc = sc; 183 ph->ph_socket = 0; 184 ph->ph_port = PORT_F; 185 ph->ph_cd[0] = SOCKET0_MCCD1; 186 ph->ph_cd[1] = SOCKET0_MCCD2; 187 ph->ph_vs[0] = SOCKET0_VS1; 188 ph->ph_vs[1] = SOCKET0_VS2; 189 ph->ph_ireq = SOCKET0_IREQ; 190 ph->ph_space[IO].reg = EP93XX_PCMCIA0_IO; 191 ph->ph_space[IO].base = EP93XX_PCMCIA0_HWBASE + EP93XX_PCMCIA_IO; 192 ph->ph_space[IO].size = EP93XX_PCMCIA_IO_SIZE; 193 ph->ph_space[COMMON].reg = EP93XX_PCMCIA0_Common; 194 ph->ph_space[COMMON].base = EP93XX_PCMCIA0_HWBASE 195 + EP93XX_PCMCIA_COMMON; 196 ph->ph_space[COMMON].size = EP93XX_PCMCIA_COMMON_SIZE; 197 ph->ph_space[ATTRIBUTE].reg = EP93XX_PCMCIA0_Attribute; 198 ph->ph_space[ATTRIBUTE].base = EP93XX_PCMCIA0_HWBASE 199 + EP93XX_PCMCIA_ATTRIBUTE; 200 ph->ph_space[ATTRIBUTE].size = EP93XX_PCMCIA_ATTRIBUTE_SIZE; 201 eppcic_attach_socket(ph); 202 203 reg = EP93XX_PCMCIA_WEN | (pcic->socket_type)(sc, 0); 204 bus_space_write_4(sc->sc_iot, sc->sc_ioh, EP93XX_PCMCIA_Ctrl, 205 EP93XX_PCMCIA_RST | reg); 206 delay(10); 207 bus_space_write_4(sc->sc_iot, sc->sc_ioh, EP93XX_PCMCIA_Ctrl, reg); 208 delay(500); 209 210 for (i = 0; i < EP93XX_PCMCIA_NSOCKET; i++) 211 eppcic_config_socket(sc->sc_ph[i]); 212 #if NEPLED > 0 213 epled_green_off(); 214 #endif 215 } 216 217 static void 218 eppcic_attach_socket(struct eppcic_handle *ph) 219 { 220 struct eppcic_softc *sc = ph->ph_sc; 221 222 ph->ph_width = 16; 223 ph->ph_vcc = 3; 224 ph->ph_event_thread = NULL; 225 ph->ph_run = 0; 226 ph->ph_ih_func = NULL; 227 ph->ph_ih_arg = NULL; 228 epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]); 229 epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]); 230 epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_vs[0]); 231 epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_vs[1]); 232 ph->ph_status[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]); 233 ph->ph_status[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]); 234 } 235 236 static void 237 eppcic_config_socket(struct eppcic_handle *ph) 238 { 239 struct eppcic_softc *sc = ph->ph_sc; 240 eppcic_chipset_tag_t pcic = sc->sc_pcic; 241 struct pcmciabus_attach_args paa; 242 int wait; 243 244 paa.paa_busname = "pcmcia"; 245 paa.pct = (pcmcia_chipset_tag_t)&eppcic_functions; 246 paa.pch = (pcmcia_chipset_handle_t)ph; 247 ph->ph_card = config_found_ia((void*)sc, "pcmciabus", &paa, 248 eppcic_print); 249 250 epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_cd[0], 251 EDGE_TRIGGER | FALLING_EDGE | DEBOUNCE, 252 IPL_TTY, eppcic_intr_carddetect, ph); 253 epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_cd[1], 254 EDGE_TRIGGER | RISING_EDGE | DEBOUNCE, 255 IPL_TTY, eppcic_intr_carddetect, ph); 256 wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_OFF); 257 delay(wait); 258 259 260 ph->ph_status[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]); 261 ph->ph_status[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]); 262 263 DPRINTFN(1, ("eppcic_config_socket: cd1=%d, cd2=%d\n",ph->ph_status[0],ph->ph_status[1])); 264 265 ph->ph_run = 1; 266 kthread_create(PRI_NONE, 0, NULL, eppcic_event_thread, ph, 267 &ph->ph_event_thread, "%s,%d", sc->sc_dev.dv_xname, 268 ph->ph_socket); 269 } 270 271 static int 272 eppcic_print(void *arg, const char *pnp) 273 { 274 return (UNCONF); 275 } 276 277 static void 278 eppcic_event_thread(void *arg) 279 { 280 struct eppcic_handle *ph = arg; 281 282 if (!(ph->ph_status[0] | ph->ph_status[1])) 283 pcmcia_card_attach(ph->ph_card); 284 285 for (;;) { 286 tsleep(ph, PWAIT, "CSC wait", 0); 287 if (!ph->ph_run) 288 break; 289 290 DPRINTFN(1, ("eppcic_event_thread: cd1=%d, cd2=%d\n",ph->ph_status[0],ph->ph_status[1])); 291 292 if (!ph->ph_status[0] && !ph->ph_status[1]) 293 pcmcia_card_attach(ph->ph_card); 294 else if (ph->ph_status[0] && ph->ph_status[1]) 295 pcmcia_card_detach(ph->ph_card, DETACH_FORCE); 296 } 297 298 DPRINTFN(1, ("eppcic_event_thread: run=%d\n",ph->ph_run)); 299 ph->ph_event_thread = NULL; 300 kthread_exit(0); 301 } 302 303 void 304 eppcic_shutdown(void *arg) 305 { 306 struct eppcic_handle *ph = arg; 307 308 DPRINTFN(1, ("eppcic_shutdown\n")); 309 ph->ph_run = 0; 310 wakeup(ph); 311 } 312 313 static int 314 eppcic_intr_carddetect(void *arg) 315 { 316 struct eppcic_handle *ph = arg; 317 struct eppcic_softc *sc = ph->ph_sc; 318 int nstatus[2]; 319 320 nstatus[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]); 321 nstatus[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]); 322 323 DPRINTFN(1, ("eppcic_intr: cd1=%#x, cd2=%#x\n",nstatus[0],nstatus[1])); 324 325 if (nstatus[0] != ph->ph_status[0] || nstatus[1] != ph->ph_status[1]) { 326 ph->ph_status[0] = nstatus[0]; 327 ph->ph_status[1] = nstatus[1]; 328 wakeup(ph); 329 } 330 return 0; 331 } 332 333 static int 334 eppcic_mem_alloc(pcmcia_chipset_handle_t pch, bus_size_t size, 335 struct pcmcia_mem_handle *pmh) 336 { 337 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 338 struct eppcic_softc *sc = ph->ph_sc; 339 340 DPRINTFN(1, ("eppcic_mem_alloc: size=%#x\n",(unsigned)size)); 341 342 pmh->memt = sc->sc_iot; 343 return 0; 344 } 345 346 static void 347 eppcic_mem_free(pcmcia_chipset_handle_t pch, struct pcmcia_mem_handle *pmh) 348 { 349 DPRINTFN(1, ("eppcic_mem_free\n")); 350 } 351 352 static int 353 eppcic_mem_map(pcmcia_chipset_handle_t pch, int kind, bus_addr_t addr, 354 bus_size_t size, struct pcmcia_mem_handle *pmh, 355 bus_size_t *offsetp, int *windowp) 356 { 357 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 358 struct eppcic_softc *sc = ph->ph_sc; 359 bus_addr_t pa; 360 int err; 361 362 DPRINTFN(1, ("eppcic_mem_map: kind=%d, addr=%#x, size=%#x\n",kind,(unsigned)addr,(unsigned)size)); 363 364 pa = addr; 365 *offsetp = 0; 366 size = round_page(size); 367 pmh->realsize = size; 368 if (kind & PCMCIA_WIDTH_MEM8) 369 ph->ph_width = 8; 370 else 371 ph->ph_width = 16; 372 switch (kind & ~PCMCIA_WIDTH_MEM_MASK) { 373 case PCMCIA_MEM_ATTR: 374 eppcic_set_pcreg(ph, ATTRIBUTE); 375 pa += ph->ph_space[ATTRIBUTE].base; 376 break; 377 case PCMCIA_MEM_COMMON: 378 eppcic_set_pcreg(ph, COMMON); 379 pa += ph->ph_space[COMMON].base; 380 break; 381 default: 382 return -1; 383 } 384 385 DPRINTFN(1, ("eppcic_mem_map: pa=%#x, *offsetp=%#x, size=%#x\n",(unsigned)pa,(unsigned)addr,(unsigned)size)); 386 387 if (!(err = bus_space_map(sc->sc_iot, pa, size, 0, &pmh->memh))) 388 *windowp = (int)pmh->memh; 389 return err; 390 } 391 392 static void 393 eppcic_mem_unmap(pcmcia_chipset_handle_t pch, int window) 394 { 395 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 396 struct eppcic_softc *sc = ph->ph_sc; 397 398 DPRINTFN(1, ("eppcic_mem_unmap: window=%#x\n",window)); 399 400 bus_space_unmap(sc->sc_iot, (bus_addr_t)window, 0x400); 401 } 402 403 static int 404 eppcic_io_alloc(pcmcia_chipset_handle_t pch, bus_addr_t start, bus_size_t size, 405 bus_size_t align, struct pcmcia_io_handle *pih) 406 { 407 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 408 struct eppcic_softc *sc = ph->ph_sc; 409 bus_addr_t pa; 410 411 DPRINTFN(1, ("eppcic_io_alloc: start=%#x, size=%#x, align=%#x\n",(unsigned)start,(unsigned)size,(unsigned)align)); 412 413 pih->iot = sc->sc_iot; 414 pih->addr = start; 415 pih->size = size; 416 pa = pih->addr + ph->ph_space[IO].base; 417 return bus_space_map(sc->sc_iot, pa, size, 0, &pih->ioh); 418 } 419 420 static void 421 eppcic_io_free(pcmcia_chipset_handle_t pch, struct pcmcia_io_handle *pih) 422 { 423 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 424 struct eppcic_softc *sc = ph->ph_sc; 425 426 DPRINTFN(1, ("eppcic_io_free\n")); 427 428 bus_space_unmap(sc->sc_iot, pih->ioh, pih->size); 429 } 430 431 static int 432 eppcic_io_map(pcmcia_chipset_handle_t pch, int width, bus_addr_t offset, 433 bus_size_t size, struct pcmcia_io_handle *pih, int *windowp) 434 { 435 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 436 437 DPRINTFN(1, ("eppcic_io_map: offset=%#x, size=%#x, width=%d",(unsigned)offset,(unsigned)size,width)); 438 439 switch (width) { 440 case PCMCIA_WIDTH_IO8: 441 DPRINTFN(1, ("(8bit)\n")); 442 ph->ph_width = 8; 443 break; 444 case PCMCIA_WIDTH_IO16: 445 case PCMCIA_WIDTH_AUTO: /* I don't understand how I check it */ 446 DPRINTFN(1, ("(16bit)\n")); 447 ph->ph_width = 16; 448 break; 449 default: 450 DPRINTFN(1, ("(unknown)\n")); 451 return -1; 452 } 453 eppcic_set_pcreg(ph, IO); 454 *windowp = 0; /* unused */ 455 return 0; 456 } 457 458 static void 459 eppcic_io_unmap(pcmcia_chipset_handle_t pch, int window) 460 { 461 DPRINTFN(1, ("eppcic_io_unmap: window=%#x\n",window)); 462 } 463 464 static void * 465 eppcic_intr_establish(pcmcia_chipset_handle_t pch, struct pcmcia_function *pf, 466 int ipl, int (*ih_func)(void *), void *ih_arg) 467 { 468 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 469 struct eppcic_softc *sc = ph->ph_sc; 470 471 DPRINTFN(1, ("eppcic_intr_establish\n")); 472 473 if (ph->ph_ih_func) 474 return 0; 475 476 ph->ph_ih_func = ih_func; 477 ph->ph_ih_arg = ih_arg; 478 return epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_ireq, 479 LEVEL_SENSE | LOW_LEVEL, 480 ipl, eppcic_intr_socket, ph); 481 } 482 483 static void 484 eppcic_intr_disestablish(pcmcia_chipset_handle_t pch, void *ih) 485 { 486 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 487 struct eppcic_softc *sc = ph->ph_sc; 488 489 DPRINTFN(1, ("eppcic_intr_disestablish\n")); 490 491 ph->ph_ih_func = NULL; 492 ph->ph_ih_arg = NULL; 493 epgpio_intr_disestablish(sc->sc_gpio, ph->ph_port, ph->ph_ireq); 494 } 495 496 static int 497 eppcic_intr_socket(void *arg) 498 { 499 struct eppcic_handle *ph = arg; 500 int err = 0; 501 502 if (ph->ph_ih_func) { 503 #if NEPLED > 0 504 epled_red_on(); 505 #endif 506 err = (*ph->ph_ih_func)(ph->ph_ih_arg); 507 #if NEPLED > 0 508 epled_red_off(); 509 #endif 510 } 511 return err; 512 } 513 514 515 static void 516 eppcic_socket_enable(pcmcia_chipset_handle_t pch) 517 { 518 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 519 struct eppcic_softc *sc = ph->ph_sc; 520 eppcic_chipset_tag_t pcic = sc->sc_pcic; 521 int wait; 522 523 DPRINTFN(1, ("eppcic_socket_enable\n")); 524 525 wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_ON); 526 delay(wait); 527 #if NEPLED > 0 528 if (!sc->sc_enable++) 529 epled_green_on(); 530 #endif 531 ph->ph_vcc = eppcic_get_voltage(ph); 532 } 533 534 static void 535 eppcic_socket_disable(pcmcia_chipset_handle_t pch) 536 { 537 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 538 struct eppcic_softc *sc = ph->ph_sc; 539 eppcic_chipset_tag_t pcic = sc->sc_pcic; 540 int wait; 541 542 DPRINTFN(1, ("eppcic_socket_disable\n")); 543 544 wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_OFF); 545 delay(wait); 546 #if NEPLED > 0 547 if (!--sc->sc_enable) 548 epled_green_off(); 549 #endif 550 } 551 552 static void 553 eppcic_socket_settype(pcmcia_chipset_handle_t pch, int type) 554 { 555 DPRINTFN(1, ("eppcic_socket_settype: type=%d",type)); 556 557 switch (type) { 558 case PCMCIA_IFTYPE_MEMORY: 559 DPRINTFN(1, ("(Memory)\n")); 560 break; 561 case PCMCIA_IFTYPE_IO: 562 DPRINTFN(1, ("(I/O)\n")); 563 break; 564 default: 565 DPRINTFN(1, ("(unknown)\n")); 566 return; 567 } 568 } 569 570 static int 571 eppcic_get_voltage(struct eppcic_handle *ph) 572 { 573 struct eppcic_softc *sc = ph->ph_sc; 574 eppcic_chipset_tag_t pcic = sc->sc_pcic; 575 int cap, vcc = 0; 576 577 cap = (pcic->power_capability)(sc, ph->ph_socket); 578 if (epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_vs[0])) { 579 if (cap | VCC_5V) 580 vcc = 5; 581 else 582 printf("%s: unsupported Vcc 5 Volts", 583 sc->sc_dev.dv_xname); 584 } else { 585 if (cap | VCC_3V) 586 vcc = 3; 587 else 588 printf("%s: unsupported Vcc 3.3 Volts", 589 sc->sc_dev.dv_xname); 590 } 591 DPRINTFN(1, ("eppcic_get_voltage: vs1=%d, vs2=%d (%dV)\n",epgpio_read_bit(sc->sc_gpio, ph->ph_port, ph->ph_vs[0]),epgpio_read_bit(sc->sc_gpio, ph->ph_port, ph->ph_vs[1]),vcc)); 592 return vcc; 593 } 594 595 #define EXTRA_DELAY 40 596 597 static void 598 eppcic_set_pcreg(struct eppcic_handle *ph, int kind) 599 { 600 struct eppcic_softc *sc = ph->ph_sc; 601 int atiming, htiming, ptiming; 602 int period = 1000000000 / sc->sc_hclk; 603 int width; 604 605 switch (ph->ph_width) { 606 case 8: 607 width = 0; 608 break; 609 case 16: 610 width = EP93XX_PCMCIA_WIDTH_16; 611 break; 612 default: 613 return; 614 } 615 switch (kind) { 616 case IO: 617 atiming = 165; htiming = 20; ptiming = 70; 618 break; 619 case COMMON: 620 #if linux_timing!=hamajima20050816 621 switch (ph->ph_vcc) { 622 case 3: 623 atiming = 465; htiming = 35; ptiming = 100; 624 break; 625 case 5: 626 atiming = 200; htiming = 20; ptiming = 30; 627 break; 628 default: 629 return; 630 } 631 break; 632 #endif 633 case ATTRIBUTE: 634 switch (ph->ph_vcc) { 635 case 3: 636 #if linux_timing!=hamajima20050816 637 atiming = 465; htiming = 35; ptiming = 100; 638 #else 639 atiming = 600; htiming = 35; ptiming = 100; 640 #endif 641 break; 642 case 5: 643 #if linux_timing!=hamajima20050816 644 atiming = 250; htiming = 20; ptiming = 30; 645 #else 646 atiming = 300; htiming = 20; ptiming = 30; 647 #endif 648 break; 649 default: 650 return; 651 } 652 break; 653 default: 654 return; 655 } 656 657 #if linux_timing!=hamajima20050816 658 period = 1000000000 / 50000000; 659 width = EP93XX_PCMCIA_WIDTH_16; 660 #endif 661 662 atiming = (atiming + EXTRA_DELAY) / period; 663 if (atiming>0xff) 664 atiming = 0xff; 665 htiming = ((htiming + EXTRA_DELAY) / period) + 1; 666 if (htiming>0xf) 667 htiming = 0xf; 668 ptiming = (ptiming + EXTRA_DELAY) / period; 669 if (ptiming>0xff) 670 ptiming = 0xff; 671 672 DPRINTFN(1, ("eppcic_set_pcreg: width=%d, access=%d, hold=%d, pre-charge=%d\n",ph->ph_width,atiming,htiming,ptiming)); 673 674 bus_space_write_4(sc->sc_iot, sc->sc_ioh, ph->ph_space[kind].reg, 675 width 676 | (atiming<<EP93XX_PCMCIA_ACCESS_SHIFT) 677 | (htiming<<EP93XX_PCMCIA_HOLD_SHIFT) 678 | (ptiming<<EP93XX_PCMCIA_PRECHARGE_SHIFT)); 679 tsleep(ph->ph_space, PWAIT, "eppcic_set_pcreg", hz / 4); 680 } 681