xref: /netbsd-src/sys/arch/arm/ep93xx/epclkreg.h (revision 50728e7823a76d5bd1a7bfa3a4eac400269b1339)
1 /*	$NetBSD: epclkreg.h,v 1.2 2005/11/12 05:33:23 hamajima Exp $ */
2 
3 /*
4  * Copyright (c) 2004 Jesse Off
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *	This product includes software developed by Ichiro FUKUHARA.
17  * 4. Neither the name of the author nor the names of any co-contributors
18  *    may be used to endorse or promote products derived from this software
19  *    without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA AND CONTRIBUTORS ``AS IS''
22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24  * ARE DISCLAIMED.  IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS
25  * HEAD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
26  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31  * THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 
35 #ifndef _EPCLKREG_H_
36 #define _EPCLKREG_H_
37 
38 /* Timer1 16-bit timer (Free running/Load based) */
39 #define	EP93XX_TIMERS_Timer1Load	0x00000000UL
40 #define	 TimerLoad_MASK			0x0000ffffUL
41 #define	EP93XX_TIMERS_Timer1Value	0x00000004UL
42 #define	 TimerValue_MASK		0x0000ffffUL
43 #define	EP93XX_TIMERS_Timer1Control	0x00000008UL
44 #define	 TimerControl_ENABLE		(1<<7)
45 #define	 TimerControl_MODE		(1<<6)
46 #define	 TimerControl_CLKSEL		(1<<3)
47 #define	EP93XX_TIMERS_Timer1Clear	0x0000000cUL
48 
49 /* Timer2 16-bit timer (Free running/Load based) */
50 #define	EP93XX_TIMERS_Timer2Load	0x00000020UL
51 #define	EP93XX_TIMERS_Timer2Value	0x00000024UL
52 #define	EP93XX_TIMERS_Timer2Control	0x00000028UL
53 #define	EP93XX_TIMERS_Timer2Clear	0x0000002cUL
54 
55 /* Timer3 32-bit timer (Free running/Load based) */
56 #define	EP93XX_TIMERS_Timer3Load	0x00000080UL
57 #define	EP93XX_TIMERS_Timer3Value	0x00000084UL
58 #define	EP93XX_TIMERS_Timer3Control	0x00000088UL
59 #define	EP93XX_TIMERS_Timer3Clear	0x0000008cUL
60 
61 /* Timer4 40-bit timer (Free running) */
62 #define	EP93XX_TIMERS_Timer4Enable	0x00000064UL
63 #define	EP93XX_TIMERS_Timer4ValueHigh	0x00000064UL
64 #define	EP93XX_TIMERS_Timer4ValueLow	0x00000060UL
65 
66 #endif /* _EPCLKREG_H_ */
67