1 /* $NetBSD: epclk.c,v 1.11 2008/01/20 16:28:22 joerg Exp $ */ 2 3 /* 4 * Copyright (c) 2004 Jesse Off 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the NetBSD 18 * Foundation, Inc. and its contributors. 19 * 4. Neither the name of The NetBSD Foundation nor the names of its 20 * contributors may be used to endorse or promote products derived 21 * from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * Driver for the ep93xx clock tick. 38 * 39 * We use the 64Hz RTC interrupt as its the only thing that allows for timekeeping 40 * of a second (crystal error only). There are two general purpose timers 41 * on the ep93xx, but they run at a frequency that makes a perfect integer 42 * number of ticks per second impossible. Note that there was an errata with 43 * the ep93xx processor and many early boards (including the Cirrus eval board) have 44 * a broken crystal oscillator input that may make this 64Hz unreliable. However, 45 * not all boards are susceptible, the Technologic Systems TS-7200 is a notable 46 * exception that is immune to this errata. --joff 47 */ 48 49 #include <sys/cdefs.h> 50 __KERNEL_RCSID(0, "$NetBSD: epclk.c,v 1.11 2008/01/20 16:28:22 joerg Exp $"); 51 52 #include <sys/types.h> 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/kernel.h> 56 #include <sys/time.h> 57 #include <sys/timetc.h> 58 #include <sys/device.h> 59 60 #include <machine/bus.h> 61 #include <machine/intr.h> 62 63 #include <arm/cpufunc.h> 64 65 #include <arm/ep93xx/epsocvar.h> 66 #include <arm/ep93xx/epclkreg.h> 67 #include <arm/ep93xx/ep93xxreg.h> 68 #include <arm/ep93xx/ep93xxvar.h> 69 #include <dev/clock_subr.h> 70 71 #include "opt_hz.h" 72 73 #define TIMER_FREQ 983040 74 75 static int epclk_match(struct device *, struct cfdata *, void *); 76 static void epclk_attach(struct device *, struct device *, void *); 77 static u_int epclk_get_timecount(struct timecounter *); 78 79 void rtcinit(void); 80 81 /* callback functions for intr_functions */ 82 static int epclk_intr(void* arg); 83 84 struct epclk_softc { 85 struct device sc_dev; 86 bus_addr_t sc_baseaddr; 87 bus_space_tag_t sc_iot; 88 bus_space_handle_t sc_ioh; 89 #if defined(HZ) && (HZ == 64) 90 bus_space_handle_t sc_teoi_ioh; 91 #endif 92 int sc_intr; 93 }; 94 95 static struct timecounter epclk_timecounter = { 96 epclk_get_timecount, /* get_timecount */ 97 0, /* no poll_pps */ 98 ~0u, /* counter_mask */ 99 TIMER_FREQ, /* frequency */ 100 "epclk", /* name */ 101 100, /* quality */ 102 NULL, /* prev */ 103 NULL, /* next */ 104 }; 105 106 static struct epclk_softc *epclk_sc = NULL; 107 108 CFATTACH_DECL(epclk, sizeof(struct epclk_softc), 109 epclk_match, epclk_attach, NULL, NULL); 110 111 #define TIMER4VAL() (*(volatile u_int32_t *)(EP93XX_APB_VBASE + \ 112 EP93XX_APB_TIMERS + EP93XX_TIMERS_Timer4ValueLow)) 113 114 static int 115 epclk_match(struct device *parent, struct cfdata *match, void *aux) 116 { 117 118 return 2; 119 } 120 121 static void 122 epclk_attach(struct device *parent, struct device *self, void *aux) 123 { 124 struct epclk_softc *sc; 125 struct epsoc_attach_args *sa; 126 bool first_run; 127 128 printf("\n"); 129 130 sc = (struct epclk_softc*) self; 131 sa = aux; 132 sc->sc_iot = sa->sa_iot; 133 sc->sc_baseaddr = sa->sa_addr; 134 sc->sc_intr = sa->sa_intr; 135 136 if (epclk_sc == NULL) { 137 first_run = true; 138 epclk_sc = sc; 139 } 140 141 if (bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size, 142 0, &sc->sc_ioh)) 143 panic("%s: Cannot map registers", self->dv_xname); 144 #if defined(HZ) && (HZ == 64) 145 if (bus_space_map(sa->sa_iot, EP93XX_APB_HWBASE + EP93XX_APB_SYSCON + 146 EP93XX_SYSCON_TEOI, 4, 0, &sc->sc_teoi_ioh)) 147 panic("%s: Cannot map registers", self->dv_xname); 148 #endif 149 150 /* clear and start the debug timer (Timer4) */ 151 bus_space_write_4(sc->sc_iot, sc->sc_ioh, EP93XX_TIMERS_Timer4Enable, 0); 152 bus_space_write_4(sc->sc_iot, sc->sc_ioh, EP93XX_TIMERS_Timer4Enable, 0x100); 153 154 if (first_run) 155 tc_init(&epclk_timecounter); 156 } 157 158 /* 159 * epclk_intr: 160 * 161 * Handle the hardclock interrupt. 162 */ 163 static int 164 epclk_intr(void *arg) 165 { 166 struct epclk_softc* sc; 167 168 sc = epclk_sc; 169 170 #if defined(HZ) && (HZ == 64) 171 bus_space_write_4(sc->sc_iot, sc->sc_teoi_ioh, 0, 1); 172 #else 173 bus_space_write_4(sc->sc_iot, sc->sc_ioh, EP93XX_TIMERS_Timer1Clear, 1); 174 #endif 175 hardclock((struct clockframe*) arg); 176 return (1); 177 } 178 179 /* 180 * setstatclockrate: 181 * 182 * Set the rate of the statistics clock. 183 * 184 * We assume that hz is either stathz or profhz, and that neither 185 * will change after being set by cpu_initclocks(). We could 186 * recalculate the intervals here, but that would be a pain. 187 */ 188 void 189 setstatclockrate(int newhz) 190 { 191 192 /* use hardclock */ 193 } 194 195 /* 196 * cpu_initclocks: 197 * 198 * Initialize the clock and get them going. 199 */ 200 void 201 cpu_initclocks(void) 202 { 203 struct epclk_softc* sc; 204 205 sc = epclk_sc; 206 stathz = profhz = 0; 207 208 #if defined(HZ) && (HZ == 64) 209 if (hz != 64) panic("HZ must be 64!"); 210 211 /* clear 64Hz interrupt status */ 212 bus_space_write_4(sc->sc_iot, sc->sc_teoi_ioh, 0, 1); 213 #else 214 #define CLOCK_SOURCE_RATE 14745600UL 215 #define CLOCK_TICK_DIV 29 216 #define CLOCK_TICK_RATE \ 217 (((CLOCK_SOURCE_RATE+(CLOCK_TICK_DIV*hz-1))/(CLOCK_TICK_DIV*hz))*hz) 218 #define LATCH ((CLOCK_TICK_RATE + hz/2) / hz) 219 /* setup and start the 16bit timer (Timer1) */ 220 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 221 EP93XX_TIMERS_Timer1Control, 222 (TimerControl_MODE)|(TimerControl_CLKSEL)); 223 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 224 EP93XX_TIMERS_Timer1Load, LATCH-1); 225 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 226 EP93XX_TIMERS_Timer1Control, 227 (TimerControl_ENABLE)|(TimerControl_MODE)|(TimerControl_CLKSEL)); 228 #endif 229 230 ep93xx_intr_establish(sc->sc_intr, IPL_CLOCK, epclk_intr, NULL); 231 } 232 233 /* 234 * delay: 235 * 236 * Delay for at least N microseconds. 237 */ 238 void 239 delay(unsigned int n) 240 { 241 unsigned int cur_tick, initial_tick; 242 int remaining; 243 244 #ifdef DEBUG 245 if (epclk_sc == NULL) { 246 printf("delay: called before start epclk\n"); 247 return; 248 } 249 #endif 250 251 /* 252 * Read the counter first, so that the rest of the setup overhead is 253 * counted. 254 */ 255 initial_tick = TIMER4VAL(); 256 257 if (n <= UINT_MAX / TIMER_FREQ) { 258 /* 259 * For unsigned arithmetic, division can be replaced with 260 * multiplication with the inverse and a shift. 261 */ 262 remaining = n * TIMER_FREQ / 1000000; 263 } else { 264 /* This is a very long delay. 265 * Being slow here doesn't matter. 266 */ 267 remaining = (unsigned long long) n * TIMER_FREQ / 1000000; 268 } 269 270 while (remaining > 0) { 271 cur_tick = TIMER4VAL(); 272 if (cur_tick > initial_tick) 273 remaining -= UINT_MAX - (cur_tick - initial_tick); 274 else 275 remaining -= initial_tick - cur_tick; 276 initial_tick = cur_tick; 277 } 278 } 279 280 static u_int 281 epclk_get_timecount(struct timecounter *tc) 282 { 283 return TIMER4VAL(); 284 } 285