1/* $NetBSD: rk3399-rockpro64.dts,v 1.11 2020/05/17 19:57:25 riastradh Exp $ */ 2 3/*- 4 * Copyright (c) 2019 Jared McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29#include "../../../external/gpl2/dts/dist/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts" 30#include "rk3399-crypto.dtsi" 31 32/ { 33 pwm-fan { 34 compatible = "pwm-fan"; 35 status = "okay"; 36 pwms = <&pwm1 0 40000 0>; 37 cooling-levels = <0 150 195 240>; 38 }; 39 40 vcc3v3_pcie: vcc3v3-pcie-regulator { 41 compatible = "regulator-fixed"; 42 regulator-min-microvolt = <3300000>; 43 regulator-max-microvolt = <3300000>; 44 enable-active-high; 45 gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; 46 pinctrl-names = "default"; 47 pinctrl-0 = <&pcie_pwr_en>; 48 regulator-name = "vcc3v3_pcie"; 49 }; 50 51 backlight: lcd-backlight { 52 compatible = "pwm-backlight"; 53 pwms = <&pwm0 0 25000 0>; 54 brightness-levels = < 55 0 1 2 3 4 5 6 7 56 8 9 10 11 12 13 14 15 57 16 17 18 19 20 21 22 23 58 24 25 26 27 28 29 30 31 59 32 33 34 35 36 37 38 39 60 40 41 42 43 44 45 46 47 61 48 49 50 51 52 53 54 55 62 56 57 58 59 60 61 62 63 63 64 65 66 67 68 69 70 71 64 72 73 74 75 76 77 78 79 65 80 81 82 83 84 85 86 87 66 88 89 90 91 92 93 94 95 67 96 97 98 99 100 101 102 103 68 104 105 106 107 108 109 110 111 69 112 113 114 115 116 117 118 119 70 120 121 122 123 124 125 126 127 71 128 129 130 131 132 133 134 135 72 136 137 138 139 140 141 142 143 73 144 145 146 147 148 149 150 151 74 152 153 154 155 156 157 158 159 75 160 161 162 163 164 165 166 167 76 168 169 170 171 172 173 174 175 77 176 177 178 179 180 181 182 183 78 184 185 186 187 188 189 190 191 79 192 193 194 195 196 197 198 199 80 200 201 202 203 204 205 206 207 81 208 209 210 211 212 213 214 215 82 216 217 218 219 220 221 222 223 83 224 225 226 227 228 229 230 231 84 232 233 234 235 236 237 238 239 85 240 241 242 243 244 245 246 247 86 248 249 250 251 252 253 254 255>; 87 default-brightness-level = <200>; 88 status = "disabled"; 89 }; 90 91 edp_panel: edp-panel { 92 compatible = "simple-panel"; 93 backlight = <&backlight>; 94 power-supply = <&vcc3v3_s0>; 95 pinctrl-names = "default"; 96 pinctrl-0 = <&edp_panel_en>; 97 enable-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; 98 prepare-delay-ms = <20>; 99 enable-delay-ms = <20>; 100 status = "disabled"; 101 102 ports { 103 #address-cells = <1>; 104 #size-cells = <0>; 105 106 port@0 { 107 reg = <0>; 108 #address-cells = <1>; 109 #size-cells = <0>; 110 111 panel_in_edp: endpoint@0 { 112 reg = <0>; 113 remote-endpoint = <&edp_out_panel>; 114 }; 115 }; 116 }; 117 }; 118 119 edp@ff970000 { 120 ports { 121 edp_out: port@1 { 122 reg = <1>; 123 #address-cells = <1>; 124 #size-cells = <0>; 125 126 edp_out_panel: endpoint@0 { 127 reg = <0>; 128 remote-endpoint = <&panel_in_edp>; 129 }; 130 }; 131 }; 132 }; 133 134#if 0 135 edp@ff970000 { 136 status = "okay"; 137 }; 138 139 edp-panel { 140 status = "okay"; 141 }; 142 143 pwm@ff420000 { 144 status = "okay"; 145 }; 146 147 lcd-backlight { 148 status = "okay"; 149 }; 150#endif 151}; 152 153&pinctrl { 154 lcd_panel { 155 edp_panel_en: edp-panel-en { 156 rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 157 }; 158 }; 159 160 pcie { 161 pcie_pwr_en: pcie-pwr-en { 162 rockchip,pins = 163 <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; 164 }; 165 166 pcie_clkreqn: pci-clkreqn { 167 rockchip,pins = 168 <2 RK_PD2 RK_FUNC_2 &pcfg_pull_none>; 169 }; 170 }; 171}; 172 173&pwm1 { 174 status = "okay"; 175}; 176 177&pcie_phy { 178 status = "okay"; 179}; 180 181&pcie0 { 182 ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; 183 num-lanes = <4>; 184 max-link-speed = <2>; 185 pinctrl-names = "default"; 186 pinctrl-0 = <&pcie_clkreqn>; 187 vpcie3v3-supply = <&vcc3v3_pcie>; 188 status = "okay"; 189}; 190 191&spi1 { 192 status = "okay"; 193 spiflash { 194 compatible = "jedec,spi-nor"; 195 reg = <0>; 196 status = "okay"; 197 }; 198}; 199 200&hdmi_sound { 201 status = "okay"; 202}; 203