1 /* $NetBSD: gtmr.c,v 1.24 2018/04/01 04:35:04 ryo Exp $ */ 2 3 /*- 4 * Copyright (c) 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: gtmr.c,v 1.24 2018/04/01 04:35:04 ryo Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/bus.h> 37 #include <sys/device.h> 38 #include <sys/intr.h> 39 #include <sys/kernel.h> 40 #include <sys/percpu.h> 41 #include <sys/proc.h> 42 #include <sys/systm.h> 43 #include <sys/timetc.h> 44 45 #include <prop/proplib.h> 46 47 #include <arm/locore.h> 48 #include <arm/cpufunc.h> 49 50 #include <arm/cortex/gtmr_var.h> 51 #include <arm/cortex/mpcore_var.h> 52 53 static int gtmr_match(device_t, cfdata_t, void *); 54 static void gtmr_attach(device_t, device_t, void *); 55 56 static u_int gtmr_get_timecount(struct timecounter *); 57 58 static struct gtmr_softc gtmr_sc; 59 60 struct gtmr_percpu { 61 uint32_t pc_delta; 62 }; 63 64 static struct timecounter gtmr_timecounter = { 65 .tc_get_timecount = gtmr_get_timecount, 66 .tc_poll_pps = 0, 67 .tc_counter_mask = ~0u, 68 .tc_frequency = 0, /* set by cpu_initclocks() */ 69 .tc_name = NULL, /* set by attach */ 70 .tc_quality = 500, 71 .tc_priv = >mr_sc, 72 .tc_next = NULL, 73 }; 74 75 CFATTACH_DECL_NEW(armgtmr, 0, gtmr_match, gtmr_attach, NULL, NULL); 76 77 /* ARGSUSED */ 78 static int 79 gtmr_match(device_t parent, cfdata_t cf, void *aux) 80 { 81 struct mpcore_attach_args * const mpcaa = aux; 82 83 if (gtmr_sc.sc_dev != NULL) 84 return 0; 85 86 /* Genertic Timer is always implemented in ARMv8-A */ 87 if (!cpu_gtmr_exists_p()) 88 return 0; 89 90 if (strcmp(mpcaa->mpcaa_name, cf->cf_name) != 0) 91 return 0; 92 93 return 1; 94 } 95 96 static void 97 gtmr_attach(device_t parent, device_t self, void *aux) 98 { 99 struct mpcore_attach_args * const mpcaa = aux; 100 struct gtmr_softc *sc = >mr_sc; 101 prop_dictionary_t dict = device_properties(self); 102 char freqbuf[sizeof("X.XXX SHz")]; 103 104 /* 105 * This runs at a fixed frequency of 1 to 50MHz. 106 */ 107 if (!prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq)) 108 sc->sc_freq = gtmr_cntfrq_read(); 109 110 KASSERT(sc->sc_freq != 0); 111 112 humanize_number(freqbuf, sizeof(freqbuf), sc->sc_freq, "Hz", 1000); 113 114 aprint_naive("\n"); 115 aprint_normal(": ARMv7 Generic 64-bit Timer (%s)\n", freqbuf); 116 117 /* 118 * Enable the virtual counter to be accessed from usermode. 119 */ 120 gtmr_cntk_ctl_write(gtmr_cntk_ctl_read() | 121 CNTKCTL_PL0VCTEN | CNTKCTL_PL0PCTEN); 122 123 self->dv_private = sc; 124 sc->sc_dev = self; 125 126 #ifdef DIAGNOSTIC 127 sc->sc_percpu = percpu_alloc(sizeof(struct gtmr_percpu)); 128 #endif 129 130 evcnt_attach_dynamic(&sc->sc_ev_missing_ticks, EVCNT_TYPE_MISC, NULL, 131 device_xname(self), "missing interrupts"); 132 133 if (mpcaa->mpcaa_irq != -1) { 134 sc->sc_global_ih = intr_establish(mpcaa->mpcaa_irq, IPL_CLOCK, 135 IST_LEVEL | IST_MPSAFE, gtmr_intr, NULL); 136 if (sc->sc_global_ih == NULL) 137 panic("%s: unable to register timer interrupt", __func__); 138 aprint_normal_dev(self, "interrupting on irq %d\n", 139 mpcaa->mpcaa_irq); 140 } 141 142 const uint32_t cnt_frq = gtmr_cntfrq_read(); 143 if (cnt_frq == 0) { 144 aprint_verbose_dev(self, "cp15 CNT_FRQ not set\n"); 145 } else if (cnt_frq != sc->sc_freq) { 146 aprint_verbose_dev(self, 147 "cp15 CNT_FRQ (%u) differs from supplied frequency\n", 148 cnt_frq); 149 } 150 151 gtmr_timecounter.tc_name = device_xname(sc->sc_dev); 152 gtmr_timecounter.tc_frequency = sc->sc_freq; 153 154 tc_init(>mr_timecounter); 155 156 /* Disable the timer until we are ready */ 157 gtmr_cntv_ctl_write(0); 158 gtmr_cntp_ctl_write(0); 159 } 160 161 void 162 gtmr_init_cpu_clock(struct cpu_info *ci) 163 { 164 struct gtmr_softc * const sc = >mr_sc; 165 166 KASSERT(ci == curcpu()); 167 168 int s = splsched(); 169 170 /* 171 * enable timer and stop masking the timer. 172 */ 173 gtmr_cntv_ctl_write(CNTCTL_ENABLE); 174 gtmr_cntp_ctl_write(CNTCTL_ENABLE); 175 #if 0 176 printf("%s: cntctl=%#x\n", __func__, gtmr_cntv_ctl_read()); 177 #endif 178 179 /* 180 * Get now and update the compare timer. 181 */ 182 arm_isb(); 183 ci->ci_lastintr = gtmr_cntvct_read(); 184 gtmr_cntv_tval_write(sc->sc_autoinc); 185 #if 0 186 printf("%s: %s: delta cval = %"PRIu64"\n", 187 __func__, ci->ci_data.cpu_name, 188 gtmr_cntv_cval_read() - ci->ci_lastintr); 189 #endif 190 splx(s); 191 KASSERT(gtmr_cntvct_read() != 0); 192 #if 0 193 printf("%s: %s: ctl %#x cmp %#"PRIx64" now %#"PRIx64"\n", 194 __func__, ci->ci_data.cpu_name, gtmr_cntv_ctl_read(), 195 gtmr_cntv_cval_read(), gtmr_cntvct_read()); 196 197 s = splsched(); 198 199 arm_isb(); 200 uint64_t now64; 201 uint64_t start64 = gtmr_cntvct_read(); 202 do { 203 arm_isb(); 204 now64 = gtmr_cntvct_read(); 205 } while (start64 == now64); 206 start64 = now64; 207 uint64_t end64 = start64 + 64; 208 uint32_t start32 = arm_pmccntr_read(); 209 do { 210 arm_isb(); 211 now64 = gtmr_cntvct_read(); 212 } while (end64 != now64); 213 uint32_t end32 = arm_pmccntr_read(); 214 215 uint32_t diff32 = end64 - start64; 216 printf("%s: %s: %u cycles per tick\n", 217 __func__, ci->ci_data.cpu_name, (end32 - start32) / diff32); 218 219 printf("%s: %s: status %#x cmp %#"PRIx64" now %#"PRIx64"\n", 220 __func__, ci->ci_data.cpu_name, gtmr_cntv_ctl_read(), 221 gtmr_cntv_cval_read(), gtmr_cntvct_read()); 222 splx(s); 223 #elif 0 224 delay(1000000 / hz + 1000); 225 #endif 226 } 227 228 void 229 gtmr_cpu_initclocks(void) 230 { 231 struct gtmr_softc * const sc = >mr_sc; 232 233 KASSERT(sc->sc_dev != NULL); 234 KASSERT(sc->sc_freq != 0); 235 236 sc->sc_autoinc = sc->sc_freq / hz; 237 238 gtmr_init_cpu_clock(curcpu()); 239 } 240 241 void 242 gtmr_delay(unsigned int n) 243 { 244 struct gtmr_softc * const sc = >mr_sc; 245 246 KASSERT(sc != NULL); 247 248 uint32_t freq = sc->sc_freq ? sc->sc_freq : gtmr_cntfrq_read(); 249 KASSERT(freq != 0); 250 251 const unsigned int incr_per_us = howmany(freq, 1000000); 252 unsigned int delta = 0, usecs = 0; 253 254 arm_isb(); 255 uint64_t last = gtmr_cntpct_read(); 256 257 while (n > usecs) { 258 arm_isb(); 259 uint64_t curr = gtmr_cntpct_read(); 260 if (curr < last) 261 delta += curr + (UINT64_MAX - last); 262 else 263 delta += curr - last; 264 265 last = curr; 266 if (delta >= incr_per_us) { 267 usecs += delta / incr_per_us; 268 delta %= incr_per_us; 269 } 270 } 271 } 272 273 void 274 gtmr_bootdelay(unsigned int ticks) 275 { 276 const uint32_t ctl = gtmr_cntv_ctl_read(); 277 gtmr_cntv_ctl_write(ctl | CNTCTL_ENABLE | CNTCTL_IMASK); 278 279 /* Write Timer/Value to set new compare time */ 280 gtmr_cntv_tval_write(ticks); 281 282 /* Spin until compare time is hit */ 283 while ((gtmr_cntv_ctl_read() & CNTCTL_ISTATUS) == 0) { 284 /* spin */ 285 } 286 287 gtmr_cntv_ctl_write(ctl); 288 } 289 290 /* 291 * gtmr_intr: 292 * 293 * Handle the hardclock interrupt. 294 */ 295 int 296 gtmr_intr(void *arg) 297 { 298 struct cpu_info * const ci = curcpu(); 299 struct clockframe * const cf = arg; 300 struct gtmr_softc * const sc = >mr_sc; 301 302 arm_isb(); 303 304 const uint32_t ctl = gtmr_cntv_ctl_read(); 305 if ((ctl & CNTCTL_ISTATUS) == 0) 306 return 0; 307 308 const uint64_t now = gtmr_cntvct_read(); 309 uint64_t delta = now - ci->ci_lastintr; 310 311 #ifdef DIAGNOSTIC 312 const uint64_t then = gtmr_cntv_cval_read(); 313 struct gtmr_percpu * const pc = percpu_getref(sc->sc_percpu); 314 KASSERTMSG(then <= now, "%"PRId64, now - then); 315 KASSERTMSG(then + pc->pc_delta >= ci->ci_lastintr + sc->sc_autoinc, 316 "%"PRId64, then + pc->pc_delta - ci->ci_lastintr - sc->sc_autoinc); 317 #endif 318 319 #if 0 320 printf("%s(%p): %s: now %#"PRIx64" delta %"PRIu64"\n", 321 __func__, cf, ci->ci_data.cpu_name, now, delta); 322 #endif 323 KASSERTMSG(delta > sc->sc_autoinc / 100, 324 "%s: interrupting too quickly (delta=%"PRIu64") autoinc=%lu", 325 ci->ci_data.cpu_name, delta, sc->sc_autoinc); 326 327 /* 328 * If we got interrupted too soon (delta < sc->sc_autoinc) 329 * or we missed (or almost missed) a tick 330 * (delta >= 7 * sc->sc_autoinc / 4), don't try to adjust for jitter. 331 */ 332 if (delta >= sc->sc_autoinc && delta <= 7 * sc->sc_autoinc / 4) { 333 delta -= sc->sc_autoinc; 334 } else { 335 delta = 0; 336 } 337 gtmr_cntv_tval_write(sc->sc_autoinc - delta); 338 339 ci->ci_lastintr = now; 340 341 #ifdef DIAGNOSTIC 342 KASSERT(delta == (uint32_t) delta); 343 pc->pc_delta = delta; 344 percpu_putref(sc->sc_percpu); 345 #endif 346 347 hardclock(cf); 348 349 sc->sc_ev_missing_ticks.ev_count += delta / sc->sc_autoinc; 350 351 return 1; 352 } 353 354 void 355 setstatclockrate(int newhz) 356 { 357 } 358 359 static u_int 360 gtmr_get_timecount(struct timecounter *tc) 361 { 362 arm_isb(); // we want the time NOW, not some instructions later. 363 return (u_int) gtmr_cntpct_read(); 364 } 365